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EP4528811
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EP About this file: EP4528811
| EP4528811 - PACKAGED SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING [Right-click to bookmark this link] | Status | Request for examination was made Status updated on 03.10.2025 Database last updated on 26.03.2026 | |
| Former | The application has been published Status updated on 21.02.2025 | Most recent event Tooltip | 03.10.2025 | The date on which the examining division becomes responsible, has been established | 03.10.2025 | Request for examination filed | published on 05.11.2025 [2025/45] | Applicant(s) | For all designated states NXP USA, Inc. 6501 William Cannon Drive Austin TX 78735 / US | [2025/13] | Inventor(s) | 01 /
GE, You 5656AG Eindhoven / NL | 02 /
TZOU, Kuei-Kang 5656AG Eindhoven / NL | 03 /
LEE, Chu-Chung 5656AG Eindhoven / NL | 04 /
TRACHT, Neil Thomas 5656AG Eindhoven / NL | 05 /
WANG, Zhijie 5656AG Eindhoven / NL | 06 /
LEE, Yit Meng 5656AG Eindhoven / NL | [2025/13] | Representative(s) | Colaiuda, Antonella NXP Semiconductors Germany GmbH Intellectual Property Group Beiersdorfstraße 12 22529 Hamburg / DE | [N/P] |
| Former [2025/13] | Hardingham, Christopher Mark NXP Semiconductors Intellectual Property Group Abbey House 25 Clarendon Road Redhill, Surrey RH1 1QZ / GB | Application number, filing date | 24194545.0 | 14.08.2024 | [2025/13] | Priority number, date | CN20231147233 | 18.08.2023 Original published format: CN202311047233 | [2025/13] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP4528811 | Date: | 26.03.2025 | Language: | EN | [2025/13] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 20.02.2025 | Classification | IPC: | H01L23/495, H01L21/683, H01L23/00 | [2025/13] | CPC: |
H10W70/424 (EP);
H10W70/438 (CN);
H10W70/479 (US);
H10P72/74 (EP);
H10W70/04 (CN);
H10W70/09 (EP);
H10W70/098 (US);
H10W70/60 (EP);
H10W72/0198 (EP,US);
H10W74/01 (CN);
H10W74/014 (EP,US);
H10W74/111 (EP);
| Designated contracting states | AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LI, LT, LU, LV, MC, ME, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR [2025/13] | Extension states | BA | Not yet paid | Validation states | GE | Not yet paid | KH | Not yet paid | MA | Not yet paid | MD | Not yet paid | TN | Not yet paid | Title | German: | VERPACKTES HALBLEITERBAUELEMENT UND HERSTELLUNGSVERFAHREN | [2025/13] | English: | PACKAGED SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING | [2025/13] | French: | DISPOSITIF SEMI-CONDUCTEUR ENCAPSULÉ ET PROCÉDÉ DE FABRICATION | [2025/13] | Examination procedure | 15.05.2025 | Amendment by applicant (claims and/or description) | 26.09.2025 | Examination requested [2025/45] | 26.09.2025 | Date on which the examining division has become responsible |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [XAI] US2017062315 (JAVIER REYNALDO CORPUZ et al.) [X] 1,3,4 * figures 2-6 *[A] 2,5,7-15 [I] 6 | [XI] WO2011123220 (FREESCALE SEMICONDUCTOR INC et al.) [X] 1,4 * figures 1-7 *[I] 6 |