| EP0022931 - Voltage level conversion circuitry and purporting method [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 15.05.1984 Database last updated on 11.04.2026 | Most recent event Tooltip | 15.05.1984 | No opposition filed within time limit | published on 18.07.1984 [1984/29] | Applicant(s) | For all designated states International Business Machines Corporation New Orchard Road Armonk, NY 10504 / US | [N/P] |
| Former [1981/04] | For all designated states International Business Machines Corporation Old Orchard Road Armonk, N.Y. 10504 / US | Inventor(s) | 01 /
Gschwendtner, Jörg Seitenstrasse 38 D-7300 Esslingen 1 / DE | 02 /
Löhlein, Wolfdieter Goldregenstrasse 2 D-7033 Herrenberg 1 / DE | [1981/04] | Representative(s) | Gaugel, Heinz Schönaicher Strasse 220 D-7030 Böblingen / DE | [N/P] |
| Former [1983/15] | Gaugel, Heinz, Dipl.-Ing. Schönaicher Strasse 220 D-7030 Böblingen / DE | ||
| Former [1981/04] | Mönig, Anton, Dipl.-Ing. IBM Deutschland Informationssysteme GmbH, Patentwesen und Urheberrecht D-70548 Stuttgart / DE | Application number, filing date | 80103391.1 | 18.06.1980 | [1981/04] | Priority number, date | DE19792929383 | 20.07.1979 Original published format: DE 2929383 | [1981/04] | Filing language | DE | Procedural language | DE | Publication | Type: | A1 Application with search report | No.: | EP0022931 | Date: | 28.01.1981 | Language: | DE | [1981/04] | Type: | B1 Patent specification | No.: | EP0022931 | Date: | 06.07.1983 | Language: | DE | [1983/27] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 06.11.1980 | Classification | IPC: | H03K19/094, H03K5/00 | [1981/04] | CPC: |
H03K19/018507 (EP,US);
H03K19/01714 (EP,US)
| Designated contracting states | DE, FR, GB, NL, SE [1981/04] | Title | German: | Schaltungsanordnung zur Spannungspegelumsetzung und zugehöriges Verfahren | [1981/04] | English: | Voltage level conversion circuitry and purporting method | [1981/04] | French: | Circuit pour convertir des niveaux de tension et procédé à cet effet | [1981/04] | File destroyed: | 12.06.1999 | Examination procedure | 06.07.1981 | Examination requested [1981/38] | 22.04.1982 | Despatch of a communication from the examining division (Time limit: M04) | 06.07.1982 | Reply to a communication from the examining division | 04.10.1982 | Despatch of communication of intention to grant (Approval: ) | 30.12.1982 | Communication of intention to grant the patent | 28.01.1983 | Fee for grant paid | 28.01.1983 | Fee for publishing/printing paid | Opposition(s) | 07.04.1984 | No opposition filed within time limit [1984/29] | Fees paid | Renewal fee | 23.06.1982 | Renewal fee patent year 03 | 21.06.1983 | Renewal fee patent year 04 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Lapses during opposition Tooltip | NL | 06.07.1983 | [1984/08] | Documents cited: | Search | IEEE JOURNAL OF SOLID-STATE CIRCUITS, Band SC-13, Nr. 3, Juni 1978 New York E. ARAI et al. "A 64-kbit Dynamic MOS RAM" Seiten 333 bis 338 * Seiten 335 bis 336, Abschnitt IV, Fig. 5 * |