EP0064569 - Input circuit for an integrated monolithic semiconductor memory using field effect transistors [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 10.01.1986 Database last updated on 19.10.2024 | Most recent event Tooltip | 28.09.2007 | Lapse of the patent in a contracting state | published on 31.10.2007 [2007/44] | Applicant(s) | For:DE
IBM DEUTSCHLAND GMBH Pascalstrasse 100 D-70569 Stuttgart / DE | For:FR
GB
IT
International Business Machines Corporation New Orchard Road Armonk, NY 10504 / US | [N/P] |
Former [1982/46] | For:DE
IBM DEUTSCHLAND GMBH Pascalstrasse 100 D-70569 Stuttgart / DE | ||
For:FR
GB
IT
International Business Machines Corporation Old Orchard Road Armonk, N.Y. 10504 / US | Inventor(s) | 01 /
Haug, Werner Pontoiser Strasse 43 D-7030 Böblingen / DE | 02 /
Clemen, Rainer Maurener Weg 133 D-7030 Böblingen / DE | [1982/46] | Representative(s) | Neuland, Johannes IBM Deutschland GmbH Schönaicher Strasse 220 D-7030 Böblingen / DE | [N/P] |
Former [1982/46] | Neuland, Johannes, Dipl.-Ing. IBM Deutschland GmbH Schönaicher Strasse 220 D-7030 Böblingen / DE | Application number, filing date | 81103660.7 | 13.05.1981 | [1982/46] | Filing language | DE | Procedural language | DE | Publication | Type: | A1 Application with search report | No.: | EP0064569 | Date: | 17.11.1982 | Language: | DE | [1982/46] | Type: | B1 Patent specification | No.: | EP0064569 | Date: | 27.02.1985 | Language: | DE | [1985/09] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 04.03.1982 | Classification | IPC: | G11C8/00, G11C11/24, G11C11/40 | [1982/46] | CPC: |
H03K19/094 (EP,US);
G11C11/4076 (EP,US);
G11C11/417 (EP,US);
G11C8/06 (EP,US);
H03K19/01714 (EP,US)
| Designated contracting states | DE, FR, GB, IT [1982/46] | Title | German: | Eingangsschaltung für einen monolithisch integrierten Halbleiterspeicher mit Feldeffekttransistoren | [1982/46] | English: | Input circuit for an integrated monolithic semiconductor memory using field effect transistors | [1982/46] | French: | Circuit d'entrée pour une mémoire monolithique semiconductrice composée de transistors à effet de champ | [1982/46] | File destroyed: | 15.01.2000 | Examination procedure | 05.04.1983 | Examination requested [1983/25] | 23.11.1983 | Despatch of a communication from the examining division (Time limit: M04) | 28.03.1984 | Reply to a communication from the examining division | 28.05.1984 | Despatch of communication of intention to grant (Approval: ) | 17.08.1984 | Communication of intention to grant the patent | 21.09.1984 | Fee for grant paid | 21.09.1984 | Fee for publishing/printing paid | Opposition(s) | 28.11.1985 | No opposition filed within time limit [1986/09] | Fees paid | Renewal fee | 19.05.1983 | Renewal fee patent year 03 | 23.05.1984 | Renewal fee patent year 04 |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Lapses during opposition Tooltip | IT | 27.02.1985 | [1999/42] | Documents cited: | Search | GB2056807 [ ] (MOSTEK CORP); | DE2935121 [ ] (TEXAS INSTRUMENTS INC) | [ ] - IEEE Journal of Solid-State Circuits, Heft 11, Nr. 3, Juni 1976, New York (US) R. REMSHARDT et al.: "A High Performance Low Power 2048-Bit Memory Chip in MOSFET Technology and its Application", seiten 352-359 * seite 354, linke spalte, zeile 1 bis rechte spalte, zeile 15; figur 4 * |