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EP0040436
European procedure
Extract from the Register of European Patents
EP About this file: EP0040436
| EP0040436 - Semiconductor device [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 21.05.1987 Database last updated on 20.11.2024 | Most recent event Tooltip | 05.10.2005 | Change: Appeal number | Applicant(s) | For all designated states Kabushiki Kaisha Toshiba 72, Horikawa-cho, Saiwai-ku Kawasaki-shi Kanagawa-ken 210-8572 / JP | [N/P] |
| Former [1981/47] | For all designated states KABUSHIKI KAISHA TOSHIBA 72, Horikawa-cho, Saiwai-ku Kawasaki-shi, Kanagawa-ken 210, Tokyo / JP | Inventor(s) | 01 /
Egawa, Hideharu 4-34-3, Seta Setagaya-ku Tokyo / JP | [1981/47] | Representative(s) | Henkel & Partner mbB Patentanwaltskanzlei, Rechtsanwaltskanzlei Maximiliansplatz 21 80333 München / DE | [N/P] |
| Former [1981/47] | Henkel, Feiler, Hänzel & Partner Möhlstrasse 37 D-81675 München / DE | Application number, filing date | 81103893.4 | 20.05.1981 | [1981/47] | Priority number, date | JP19800066971 | 20.05.1980 Original published format: JP 6697180 | JP19800066972 | 20.05.1980 Original published format: JP 6697280 | [1981/47] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0040436 | Date: | 25.11.1981 | Language: | EN | [1981/47] | Type: | A3 Search report | No.: | EP0040436 | Date: | 13.01.1982 | Language: | EN | [1982/02] | Type: | B1 Patent specification | No.: | EP0040436 | Date: | 30.04.1986 | Language: | EN | [1986/18] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 11.11.1981 | Classification | IPC: | H01L27/08, H01L27/12, H03K19/094 | [1981/47] | CPC: |
H01L21/86 (EP,US);
H01L27/092 (EP,US);
H01L27/12 (EP,US);
H03K19/09446 (EP,US);
H03K19/09487 (EP,US);
H03K3/356 (EP,US);
Y10S257/903 (EP,US)
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| Designated contracting states | DE, FR, GB, NL [1981/47] | Title | German: | Halbleiter-Bauelement | [1981/47] | English: | Semiconductor device | [1981/47] | French: | Dispositif à semiconducteurs | [1981/47] | Examination procedure | 21.05.1981 | Examination requested [1981/47] | 23.03.1984 | Despatch of a communication from the examining division (Time limit: M04) | 24.07.1984 | Reply to a communication from the examining division | 02.04.1985 | Despatch of communication of intention to grant (Approval: ) | 21.06.1985 | Communication of intention to grant the patent | 23.09.1985 | Fee for grant paid | 23.09.1985 | Fee for publishing/printing paid | Appeal following examination | 22.07.1987 | Appeal received No. J0030/94 | 21.09.1987 | Statement of grounds filed | 09.10.1995 | Result of appeal procedure: other kind of disposal | Divisional application(s) | EP84100881.6 / EP0122371 | Opposition(s) | 31.01.1987 | No opposition filed within time limit [1987/28] | Fees paid | Renewal fee | 27.05.1983 | Renewal fee patent year 03 | 25.05.1984 | Renewal fee patent year 04 | 29.05.1985 | Renewal fee patent year 05 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]US4035829 (IPRI ALFRED CHARLES, et al) | [ ] - IBM Technical Disclosure Bulletin, Vol. 13, No. 12, May 1971, New York GAENSSLEN, "Complementary Four Device FET Memory Cell" pages 3614 to 3615 | [A] - Computer Design, Vol. 17, No. 9, September 1978, Arlington SMITH et al., "CMOS on Sapphire" pages 194, 196, 198 |