-
EP0035408
European procedure
Extract from the Register of European Patents
EP About this file: EP0035408
| EP0035408 - Circuit for maintaining the potential of a node of a MOS dynamic circuit [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 24.04.1986 Database last updated on 15.06.2024 | Most recent event Tooltip | 24.04.1986 | No opposition filed within time limit | published on 11.06.1986 [1986/24] | Applicant(s) | For all designated states FUJITSU LIMITED 1015, Kamikodanaka, Nakahara-ku Kawasaki-shi Kanagawa 211 / JP | [N/P] |
| Former [1981/36] | For all designated states FUJITSU LIMITED 1015, Kamikodanaka, Nakahara-ku Kawasaki-shi, Kanagawa 211 / JP | Inventor(s) | 01 /
Nakano, Tomio 1-11-2-12-404, Shirahatadai Takatsu-ku Kawasaki-shi Kanagawa 213 / JP | [1981/36] | Representative(s) | George, Sidney Arthur, et al GILL JENNINGS & EVERY 53-64 Chancery Lane London WC2A 1HN / GB | [1981/36] | Application number, filing date | 81300884.4 | 03.03.1981 | [1981/36] | Priority number, date | JP19800026447 | 03.03.1980 Original published format: JP 2644780 | [1981/36] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0035408 | Date: | 09.09.1981 | Language: | EN | [1981/36] | Type: | A3 Search report | No.: | EP0035408 | Date: | 24.02.1982 | Language: | EN | [1982/08] | Type: | B1 Patent specification | No.: | EP0035408 | Date: | 26.06.1985 | Language: | EN | [1985/26] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 23.12.1981 | Classification | IPC: | H03K19/096, H03K17/687, H03K5/02, G11C7/00 | [1982/08] | CPC: |
H03K19/096 (EP,US);
H03K5/023 (EP,US)
|
| Former IPC [1981/36] | H03K19/096, H03K17/687, H03K5/02 | Designated contracting states | DE, FR, GB, NL [1981/36] | Title | German: | Schaltung zur Aufrechterhaltung des Potentials eines Schaltungsknotens in einer dynamischen MOS-Schaltung | [1981/36] | English: | Circuit for maintaining the potential of a node of a MOS dynamic circuit | [1981/36] | French: | Circuit pour maintenir le potentiel d'un noeud d'un circuit dynamique du type MOS | [1981/36] | Examination procedure | 05.08.1982 | Examination requested [1982/41] | 03.06.1983 | Despatch of a communication from the examining division (Time limit: M06) | 06.12.1983 | Reply to a communication from the examining division | 12.01.1984 | Despatch of a communication from the examining division (Time limit: M04) | 10.05.1984 | Reply to a communication from the examining division | 18.09.1984 | Despatch of communication of intention to grant (Approval: ) | 07.12.1984 | Communication of intention to grant the patent | 18.02.1985 | Fee for grant paid | 18.02.1985 | Fee for publishing/printing paid | Opposition(s) | 27.03.1986 | No opposition filed within time limit [1986/24] | Fees paid | Renewal fee | 17.03.1983 | Renewal fee patent year 03 | 14.03.1984 | Renewal fee patent year 04 | 13.03.1985 | Renewal fee patent year 05 |
| Opt-out from the exclusive Tooltip competence of the Unified Patent Court | See the Register of the Unified Patent Court for opt-out data | ||
| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | US4162416 [ ] (BEECHAM DAVID [US], et al); | US3805095 [ ] (LEE J, et al); | US3986044 [ ] (MADLAND PAUL DALE, et al); | EP0005743 [ ] (IBM [US]); | DE2920966 [ ] (NIPPON ELECTRIC CO) |