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EP0075942
European procedure
Extract from the Register of European Patents
EP About this file: EP0075942
| EP0075942 - Memory circuit [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 15.06.1990 Database last updated on 08.04.2026 | Most recent event Tooltip | 15.06.1990 | No opposition filed within time limit | published on 01.08.1990 [1990/31] | Applicant(s) | For all designated states NEC Corporation 7-1, Shiba 5-chome Minato-ku Tokyo 108-8001 / JP | [N/P] |
| Former [1983/14] | For all designated states NEC CORPORATION 7-1, Shiba 5-chome Minato-ku Tokyo / JP | Inventor(s) | 01 /
Nagami, Akira c/o Nippon Electric Co., Ltd. 33-1, Shiba Gochome Minato-ku Tokyo / JP | [1983/14] | Representative(s) | Glawe, Delfs, Moll Partnerschaft mbB von Patent- und Rechtsanwälten Postfach 26 01 62 80058 München / DE | [N/P] |
| Former [1983/14] | Glawe, Delfs, Moll & Partner Patentanwälte Postfach 26 01 62 D-80058 München / DE | Application number, filing date | 82109005.7 | 29.09.1982 | [1983/14] | Priority number, date | JP19810154347 | 29.09.1981 Original published format: JP 15434781 | [1983/14] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0075942 | Date: | 06.04.1983 | Language: | EN | [1983/14] | Type: | A3 Search report | No.: | EP0075942 | Date: | 29.01.1986 | Language: | EN | [1986/05] | Type: | B1 Patent specification | No.: | EP0075942 | Date: | 16.08.1989 | Language: | EN | [1989/33] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 26.11.1985 | Classification | IPC: | G11C11/24 | [1983/14] | CPC: |
G11C11/406 (EP,US)
| Designated contracting states | DE, FR, GB [1983/14] | Title | German: | Speicherschaltung | [1983/14] | English: | Memory circuit | [1983/14] | French: | Circuit de mémoire | [1983/14] | Examination procedure | 29.07.1986 | Examination requested [1986/45] | 17.12.1987 | Despatch of a communication from the examining division (Time limit: M06) | 24.05.1988 | Reply to a communication from the examining division | 05.10.1988 | Despatch of communication of intention to grant (Approval: Yes) | 14.02.1989 | Communication of intention to grant the patent | 19.05.1989 | Fee for grant paid | 19.05.1989 | Fee for publishing/printing paid | Opposition(s) | 17.05.1990 | No opposition filed within time limit [1990/31] | Fees paid | Renewal fee | 19.09.1984 | Renewal fee patent year 03 | 19.09.1985 | Renewal fee patent year 04 | 19.09.1986 | Renewal fee patent year 05 | 21.09.1987 | Renewal fee patent year 06 | 22.09.1988 | Renewal fee patent year 07 | Penalty fee | Penalty fee Rule 85b EPC 1973 | 29.07.1986 | M02 Not yet paid |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [AD] 1979 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, 15th February 1979, pages 144-145, IEEE, Digest of Technical Papers, New York, US; S.SHEFFIELD EATON: "A 5V-Only 2Kx8 Dynamic RAM" [AD] |