EP0083405 - Chip carrier for large scale integrated circuits and a method for the fabrication of the carrier [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 11.01.1990 Database last updated on 12.06.2024 | Most recent event Tooltip | 11.01.1990 | No opposition filed within time limit | published on 28.02.1990 [1990/09] | Applicant(s) | For all designated states International Business Machines Corporation New Orchard Road Armonk, NY 10504 / US | [N/P] |
Former [1983/28] | For all designated states International Business Machines Corporation Old Orchard Road Armonk, N.Y. 10504 / US | Inventor(s) | 01 /
Chance, Dudley Augustus 21 Deepwood Drive Danbury, Ct. 06810 / US | 02 /
Kopcsay, Gerard Vincent 2950 Curry Street Yorktown Heights, NY 10598 / US | [1983/28] | Representative(s) | Ekström, Gösta IBM Svenska AB Intellectual Property Department 163 92 Stockholm / SE | [N/P] |
Former [1987/46] | Ekström, Gösta E. IBM Svenska AB Intellectual Property Department S-163 92 Stockholm / SE | ||
Former [1983/28] | Ahlman, Bertel IBM Svenska AB Intellectual Property Department S-163 92 Stockholm / SE | Application number, filing date | 82110206.8 | 05.11.1982 | [1983/28] | Priority number, date | US19810336485 | 31.12.1981 Original published format: US 336485 | [1983/28] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0083405 | Date: | 13.07.1983 | Language: | EN | [1983/28] | Type: | A3 Search report | No.: | EP0083405 | Date: | 15.05.1985 | Language: | EN | [1985/20] | Type: | B1 Patent specification | No.: | EP0083405 | Date: | 15.03.1989 | Language: | EN | [1989/11] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 15.03.1985 | Classification | IPC: | H01L23/52, H01L23/56 | [1983/28] | CPC: |
H01L23/5383 (EP,US);
H01L23/642 (EP,US);
H01L2224/16 (EP,US);
H01L2924/09701 (EP,US);
H05K1/0286 (EP,US);
H05K1/162 (EP,US)
| Designated contracting states | DE, FR, GB [1983/28] | Title | German: | Chipträger für hochintegrierte Schaltungen und ein Verfahren zur Herstellung des Trägers | [1983/28] | English: | Chip carrier for large scale integrated circuits and a method for the fabrication of the carrier | [1983/28] | French: | Support de puce pour circuits intégrés à grande échelle et un procédé pour la fabrication du support | [1983/28] | File destroyed: | 12.06.1999 | Examination procedure | 21.10.1983 | Examination requested [1986/08] | 11.03.1987 | Despatch of a communication from the examining division (Time limit: M04) | 11.09.1987 | Reply to a communication from the examining division | 30.06.1988 | Despatch of communication of intention to grant (Approval: Yes) | 06.09.1988 | Communication of intention to grant the patent | 19.09.1988 | Fee for grant paid | 19.09.1988 | Fee for publishing/printing paid | Opposition(s) | 16.12.1989 | No opposition filed within time limit [1990/09] | Request for further processing for: | 11.09.1987 | Request for further processing filed | 11.09.1987 | Full payment received (date of receipt of payment) Request granted | 06.10.1987 | Decision despatched | Fees paid | Renewal fee | 23.11.1984 | Renewal fee patent year 03 | 26.11.1985 | Renewal fee patent year 04 | 25.11.1986 | Renewal fee patent year 05 | 30.11.1987 | Renewal fee patent year 06 | 26.11.1988 | Renewal fee patent year 07 |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]US3829356 (RUTT T); | [A]EP0000384 (IBM [US]); | [A]US4237522 (THOMPSON DAVID A) | [A] - IBM TECHNICAL DISCLOSURE BULLETIN, Vol. 21, No. 12, May 1979, NEW YORK, (US). Page 4801 A. DRUMM et al.:"EC pad for multichip-module substrate nets". | [A] - IBM TECHNICAL DISCLOSURE BULLETIN, Vol. 24, No. 1B, June 1981, NEW YORK, (US). Pages 727-729. C.W. HO:"High-speed multilayer ceramic chip carrier". | [A] - IBM TECHNICAL DISCLOSURE BULLETIN, Vol. 22, No. 8A, January 1980, NEW YORK, (US). Pages 3410-3414. C.W. HO et al.:"Multiple LSI siliconchip modules with power buses composed of laminated silicon sheets with metallized upper and lower surfaces". |