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EP0063028
European procedure
Extract from the Register of European Patents
EP About this file: EP0063028
| EP0063028 - Semiconductor integrated circuit [Right-click to bookmark this link] | Status | Patent revoked Status updated on 13.01.1988 Database last updated on 08.06.2024 | Most recent event Tooltip | 13.01.1988 | Revocation of patent | published on 02.03.1988 [1988/09] | Applicant(s) | For all designated states Hitachi, Ltd. 5-1, Marunouchi 1-chome Chiyoda-ku Tokyo 100 / JP | [N/P] |
| Former [1982/42] | For all designated states Hitachi, Ltd. 5-1, Marunouchi 1-chome Chiyoda-ku, Tokyo 100 / JP | Inventor(s) | 01 /
Kaneko, Kenji Hitachi-Owada Apartment House E204 47-2, Akatsukicho-1-chome Hachioji-shi / JP | 02 /
Nagata, Minoru 1558 Josuihoncho Kodaira-shi / JP | 03 /
Furihata, Makoto 1071-75 Nagyoku Tamamuracho Sawa-gun Gunma-ken / JP | 04 /
Ogura, Setsuo 1421 Kaminakaicho Takasaki-shi / JP | 05 /
Okabe, Takahiro 2196-36 Hirai Hinodecho Nishitama-gun Tokyo / JP | 06 /
Sato, Mitsuya 9-15 Fujimoto-1-chome Kokubunji-shi / JP | [1982/42] | Representative(s) | Paget, Hugh Charles Edward, et al Mewburn Ellis LLP City Tower 40 Basinghall Street London EC2V 5DE / GB | [N/P] |
| Former [1982/42] | Paget, Hugh Charles Edward, et al MEWBURN ELLIS York House 23 Kingsway London WC2B 6HP / GB | Application number, filing date | 82301835.3 | 07.04.1982 | [1982/42] | Priority number, date | JP19810051783 | 08.04.1981 Original published format: JP 5178381 | [1982/42] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0063028 | Date: | 20.10.1982 | Language: | EN | [1982/42] | Type: | A3 Search report | No.: | EP0063028 | Date: | 05.10.1983 | Language: | EN | [1983/40] | Type: | B1 Patent specification | No.: | EP0063028 | Date: | 06.08.1986 | Language: | EN | [1986/32] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 03.08.1983 | Classification | IPC: | H01L27/02 | [1982/42] | CPC: |
H01L27/0244 (EP,US);
H01L27/06 (EP,US)
| Designated contracting states | DE, FR, GB, IT [1982/42] | Title | German: | Integrierte Halbleiterschaltung | [1982/42] | English: | Semiconductor integrated circuit | [1982/42] | French: | Circuit semiconducteur intégré | [1982/42] | Examination procedure | 08.12.1983 | Examination requested [1984/07] | 02.01.1985 | Despatch of a communication from the examining division (Time limit: M06) | 04.07.1985 | Reply to a communication from the examining division | 01.10.1985 | Despatch of communication of intention to grant (Approval: ) | 22.01.1986 | Communication of intention to grant the patent | 19.02.1986 | Fee for grant paid | 19.02.1986 | Fee for publishing/printing paid | Opposition(s) | Opponent(s) | 01
02.05.1987
25.05.1987
ADMISSIBLE TELEFUNKEN electronic GmbH Postfach 35 35 D-74025 Heilbronn / DE Opponent's representative Maute, Hans-Jürgen DaimlerChrysler AG, Theresienstrasse 2 74072 Heilbronn / DE | [N/P] |
| Former [1987/27] | |||
| Opponent(s) | 01
02.05.1987
25.05.1987
ADMISSIBLE TELEFUNKEN electronic GmbH Postfach 35 35 D-74025 Heilbronn / DE Opponent's representative Maute, Hans-Jürgen, Dipl.-Ing. TEMIC TELEFUNKEN microelectronic GmbH, Postfach 35 35 D-74025 Heilbronn / DE | 23.06.1987 | Invitation to proprietor to file observations on the notice of opposition | 14.09.1987 | Reply of patent proprietor to notice(s) of opposition | 01.10.1987 | Despatch of communication that the patent will be revoked | 11.10.1987 | Legal effect of revocation of patent [1988/09] | Fees paid | Renewal fee | 21.04.1984 | Renewal fee patent year 03 | 18.04.1985 | Renewal fee patent year 04 | 21.04.1986 | Renewal fee patent year 05 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]JP5387186 ; | [A]JP5387186 | [A] - PATENTS ABSTRACTS OF JAPAN, vol. 2, no. 121, October 12, 1978, page 7074 E 78 & JP - A - 53 87186 (HITACHI SEISAKUSHO K.K.) 08.01.1078, & JP5387186 A 00000000 | [ ] - SIEMENS FORSCH. & ENTWICKL. BERICHTE, vol. 9, no. 1, 1980, pages 41-46, Berlin, DE | Examination | - SIEMENS FORSCH. & ENTWICKL. BERICHTE, vol. 9, no. 1, 1980, pages 41-46, Berlin, DE, W. UMKEHRER et al.: "Verlustarme grossintegrierte Matrixbaustein in I2L-Technik" |