EP0083210 - A semiconductor device which prevents soft errors [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 24.09.1987 Database last updated on 10.08.2024 | Most recent event Tooltip | 07.03.1997 | Lapse of the patent in a contracting state | published on 23.04.1997 [1997/17] | Applicant(s) | For all designated states FUJITSU LIMITED 1015, Kamikodanaka, Nakahara-ku Kawasaki-shi Kanagawa 211 / JP | [N/P] |
Former [1983/27] | For all designated states FUJITSU LIMITED 1015, Kamikodanaka, Nakahara-ku Kawasaki-shi, Kanagawa 211 / JP | Inventor(s) | 01 /
Tatematsu, Takeo 2-33, 1550, Shimokurata-cho Totsuka-ku Yokohama-shi Kanagawa 244 / JP | [1983/27] | Representative(s) | Fane, Christopher Robin King, et al Haseltine Lake & Co., Imperial House, 15-19 Kingsway London WC2B 6UD / GB | [N/P] |
Former [1983/27] | Fane, Christopher Robin King, et al HASELTINE LAKE & CO. Hazlitt House 28 Southampton Buildings Chancery Lane London, WC2A 1AT / GB | Application number, filing date | 82306891.1 | 23.12.1982 | [1983/27] | Priority number, date | JP19810214809 | 29.12.1981 Original published format: JP 21480981 | [1983/27] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0083210 | Date: | 06.07.1983 | Language: | EN | [1983/27] | Type: | A3 Search report | No.: | EP0083210 | Date: | 07.12.1983 | Language: | EN | [1983/49] | Type: | B1 Patent specification | No.: | EP0083210 | Date: | 26.11.1986 | Language: | EN | [1986/48] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 04.10.1983 | Classification | IPC: | H01L27/10, H01L21/26 | [1983/27] | CPC: |
H01L23/556 (EP);
H10B12/30 (EP);
H01L2924/0002 (EP)
| C-Set: |
H01L2924/0002, H01L2924/00 (EP)
| Designated contracting states | DE, FR, GB [1983/27] | Title | German: | Halbleiteranordnung mit einer "Soft-error", Präventivstruktur | [1983/27] | English: | A semiconductor device which prevents soft errors | [1983/27] | French: | Dispositif semi-conducteur comprenant une structure préventive contre des erreurs du type "soft error" | [1983/27] | File destroyed: | 20.04.2002 | Examination procedure | 01.02.1984 | Examination requested [1984/15] | 12.12.1984 | Despatch of a communication from the examining division (Time limit: M07) | 22.07.1985 | Reply to a communication from the examining division | 13.09.1985 | Despatch of a communication from the examining division (Time limit: M02) | 25.11.1985 | Reply to a communication from the examining division | 13.02.1986 | Despatch of communication of intention to grant (Approval: ) | 30.05.1986 | Communication of intention to grant the patent | 16.07.1986 | Fee for grant paid | 16.07.1986 | Fee for publishing/printing paid | Opposition(s) | 27.08.1987 | No opposition filed within time limit [1987/46] | Fees paid | Renewal fee | 14.12.1984 | Renewal fee patent year 03 | 13.12.1985 | Renewal fee patent year 04 |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]JP56107571 ; | [A]JP55156358 | Examination | EP0023782 | EP0030856 |