Extract from the Register of European Patents

EP About this file: EP0099983

EP0099983 - Semiconductor memory device [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  11.01.1990
Database last updated on 11.04.2026
Most recent event   Tooltip11.01.1990No opposition filed within time limitpublished on 28.02.1990 [1990/09]
Applicant(s)For all designated states
Kabushiki Kaisha Toshiba
72, Horikawa-cho
Saiwai-ku
Kawasaki-shi
Kanagawa-ken 210-8572 / JP
[N/P]
Former [1984/06]For all designated states
KABUSHIKI KAISHA TOSHIBA
72, Horikawa-cho, Saiwai-ku
Kawasaki-shi, Kanagawa-ken 210, Tokyo / JP
Inventor(s)01 / Ariizumi, Shoji
1-11-10-202, Tamazutsumi
Setagaya-ku Tokyo / JP
02 / Segawa, Makoto
1-16-3, Tamazutsumi
Setagaya-ku Tokyo / JP
03 / Masuoka, Fujio
1-14-6, Takeyama
Midori-ku Yokohama-shi / JP
[1984/06]
Representative(s)Lehn, Werner, et al
Hoffmann Eitle, Patent- und Rechtsanwälte, Postfach 81 04 20
81904 München / DE
[N/P]
Former [1984/06]Lehn, Werner, Dipl.-Ing., et al
Hoffmann, Eitle & Partner, Patentanwälte, Postfach 81 04 20
D-81904 München / DE
Application number, filing date83105818.514.06.1983
[1984/06]
Priority number, dateJP1982012534419.07.1982         Original published format: JP 12534482
[1984/06]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0099983
Date:08.02.1984
Language:EN
[1984/06]
Type: A3 Search report 
No.:EP0099983
Date:27.11.1985
Language:EN
[1985/48]
Type: B1 Patent specification 
No.:EP0099983
Date:08.03.1989
Language:EN
[1989/10]
Search report(s)(Supplementary) European search report - dispatched on:EP26.09.1985
ClassificationIPC:H01L27/10, G11C11/40
[1984/06]
CPC:
H10B10/15 (EP,US); Y10S257/903 (EP,US)
Designated contracting statesDE,   FR,   GB [1984/06]
TitleGerman:Halbleiterspeichervorrichtung[1984/06]
English:Semiconductor memory device[1984/06]
French:Dispositif de mémoire à semi-conducteur[1984/06]
Examination procedure14.06.1983Examination requested  [1984/06]
11.08.1987Despatch of a communication from the examining division (Time limit: M04)
11.12.1987Reply to a communication from the examining division
04.05.1988Despatch of communication of intention to grant (Approval: Yes)
31.08.1988Communication of intention to grant the patent
21.11.1988Fee for grant paid
21.11.1988Fee for publishing/printing paid
Opposition(s)09.12.1989No opposition filed within time limit [1990/09]
Fees paidRenewal fee
20.06.1985Renewal fee patent year 03
11.06.1986Renewal fee patent year 04
22.06.1987Renewal fee patent year 05
14.06.1988Renewal fee patent year 06
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Documents cited:Search[A]   ELECTRONIC ENGINEERING, vol. 53, no. 650, March 1981, pages 51-55, London, GB; T. YASUI et al.: "High speed low-power CMOS static RAMs" [A]
 [A]   ELECTRONICS, vol. 52, no. 9, April 1979, pages 125-135, New York, US; R.P. CAPECE: "The race heats up in fast static RAMs" [A]
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