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EP0106201
European procedure
Extract from the Register of European Patents
EP About this file: EP0106201
| EP0106201 - Display control circuit for reading display data from a video RAM constituted by a dynamic RAM, thereby refreshing memory cells of the video RAM [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 30.09.1988 Database last updated on 14.09.2024 | Most recent event Tooltip | 30.09.1988 | No opposition filed within time limit | published on 17.11.1988 [1988/46] | Applicant(s) | For all designated states Kabushiki Kaisha Toshiba 72, Horikawa-cho, Saiwai-ku Kawasaki-shi Kanagawa-ken 210-8572 / JP | [N/P] |
| Former [1984/17] | For all designated states KABUSHIKI KAISHA TOSHIBA 72, Horikawa-cho, Saiwai-ku Kawasaki-shi, Kanagawa-ken 210, Tokyo / JP | Inventor(s) | 01 /
Ishii, Takatoshi 3-23-6, Imai Oome-shi Tokyo / JP | [1984/17] | Representative(s) | Henkel & Partner mbB Patentanwaltskanzlei, Rechtsanwaltskanzlei Maximiliansplatz 21 80333 München / DE | [N/P] |
| Former [1984/17] | Henkel, Feiler, Hänzel & Partner Möhlstrasse 37 D-81675 München / DE | Application number, filing date | 83109349.7 | 20.09.1983 | [1984/17] | Priority number, date | JP19820163424 | 20.09.1982 Original published format: JP 16342482 | [1984/17] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0106201 | Date: | 25.04.1984 | Language: | EN | [1984/17] | Type: | A3 Search report | No.: | EP0106201 | Date: | 21.11.1985 | Language: | EN | [1985/47] | Type: | B1 Patent specification | No.: | EP0106201 | Date: | 02.12.1987 | Language: | EN | [1987/49] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 19.09.1985 | Classification | IPC: | G09G1/16 | [1984/17] | CPC: |
G09G5/222 (EP,US)
| Designated contracting states | DE, FR, GB, IT [1984/17] | Title | German: | Anzeigesteuereinrichtung zum Lesen von Anzeigedaten aus einem dynamischen Video-RAM und gleichzeitigen Auffrischen von Speicherzellen des Video-RAMS | [1984/17] | English: | Display control circuit for reading display data from a video RAM constituted by a dynamic RAM, thereby refreshing memory cells of the video RAM | [1984/17] | French: | Circuit de commande d'affichage pour la lecture de données d'affichage dans une mémoire dynamique vidéo à accès aléatoire, et en outre en rafraîchissant des cellules de la mémoire vidéo | [1984/17] | Examination procedure | 17.10.1983 | Examination requested [1984/17] | 20.01.1987 | Despatch of communication of intention to grant (Approval: ) | 08.05.1987 | Communication of intention to grant the patent | 22.07.1987 | Fee for grant paid | 22.07.1987 | Fee for publishing/printing paid | Opposition(s) | 03.09.1988 | No opposition filed within time limit [1988/46] | Fees paid | Renewal fee | 13.09.1985 | Renewal fee patent year 03 | 11.09.1986 | Renewal fee patent year 04 | 18.09.1987 | Renewal fee patent year 05 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]DE2636788 (SIEMENS AG); | [A]US4129859 (IWAMURA M [JP], et al) |