-
EP0109106
European procedure
Extract from the Register of European Patents
EP About this file: EP0109106
| EP0109106 - Circuit for converting signal levels between a saturated logic and a non-saturated logic [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 20.11.1987 Database last updated on 09.04.2026 | Most recent event Tooltip | 05.09.1988 | Lapse of the patent in a contracting state | published on 26.10.1988 [1988/43] | Applicant(s) | For:FR
RTC-COMPELEC 130, Avenue Ledru-Rollin F-75011 Paris / FR | For:DE
GB
NL
Koninklijke Philips Electronics N.V. Groenewoudseweg 1 5621 BA Eindhoven / NL | [N/P] |
| Former [1986/46] | For:FR
RTC-COMPELEC 130, Avenue Ledru-Rollin F-75011 Paris / FR | ||
| For:DE
GB
NL
Philips Electronics N.V. Groenewoudseweg 1 NL-5621 BA Eindhoven / NL | |||
| Former [1986/33] | For:FR
RTC-COMPELEC 130 Avenue Ledru-Rollin F-75011 Paris / FR | ||
| For:DE
GB
NL
Philips Electronics N.V. Groenewoudseweg 1 NL-5621 BA Eindhoven / NL | |||
| Former [1984/21] | For:FR
R.T.C. LA RADIOTECHNIQUE-COMPELEC Société anonyme dite: 51 rue Carnot BP 301 F-92156 Suresnes Cédex / FR | ||
| For:DE
GB
NL
Philips Electronics N.V. Groenewoudseweg 1 NL-5621 BA Eindhoven / NL | Inventor(s) | 01 /
Gloaguen, Gilbert Société Civile S.P.I.D. 209 rue de l'Université F-75007 Paris / FR | 02 /
Moussie, Michel Société Civile S.P.I.D. 209 rue de l'Université F-75007 Paris / FR | [1984/21] | Representative(s) | Pinchon, Pierre, et al Société Civile S.P.I.D. 156, Boulevard Haussmann F-75008 Paris / FR | [1984/21] | Application number, filing date | 83201475.7 | 14.10.1983 | [1984/21] | Priority number, date | FR19820017397 | 18.10.1982 Original published format: FR 8217397 | [1984/21] | Filing language | FR | Procedural language | FR | Publication | Type: | A1 Application with search report | No.: | EP0109106 | Date: | 23.05.1984 | Language: | FR | [1984/21] | Type: | B1 Patent specification | No.: | EP0109106 | Date: | 07.01.1987 | Language: | FR | [1987/02] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 27.02.1984 | Classification | IPC: | H03K19/092 | [1984/21] | CPC: |
H03K19/01806 (EP,US)
| Designated contracting states | DE, FR, GB, NL [1984/21] | Title | German: | Schaltung zur Signalpegelumsetzung zwischen gesättigter und ungesättigter Logik | [1984/21] | English: | Circuit for converting signal levels between a saturated logic and a non-saturated logic | [1984/21] | French: | Circuit convertisseur de niveaux de signaux entre une logique de type saturée et une logique de type non saturée | [1984/21] | File destroyed: | 03.03.2001 | Examination procedure | 19.07.1984 | Examination requested [1984/41] | 07.06.1985 | Despatch of a communication from the examining division (Time limit: M06) | 18.11.1985 | Reply to a communication from the examining division | 11.02.1986 | Despatch of communication of intention to grant (Approval: ) | 06.06.1986 | Communication of intention to grant the patent | 01.09.1986 | Fee for grant paid | 01.09.1986 | Fee for publishing/printing paid | Opposition(s) | 08.10.1987 | No opposition filed within time limit [1988/01] | Fees paid | Renewal fee | 18.10.1985 | Renewal fee patent year 03 | 21.10.1986 | Renewal fee patent year 04 |
| Opt-out from the exclusive Tooltip competence of the Unified Patent Court | See the Register of the Unified Patent Court for opt-out data | ||
| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Lapses during opposition Tooltip | NL | 07.01.1987 | [1988/43] | Documents cited: | Search | [A] IBM TECHNICAL DISCLOSURE BULLETIN, vol. 12, no. 2, juillet 1969, page 296, New York, US | Examination | D. M. TAYLOR et al.: "Logic signal level shift circuit" |