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EP0127830
European procedure
Extract from the Register of European Patents
EP About this file: EP0127830
| EP0127830 - Microprocessor system with a multibyte system bus [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 09.11.1991 Database last updated on 11.04.2026 | Most recent event Tooltip | 09.11.1991 | No opposition filed within time limit | published on 02.01.1992 [1992/01] | Applicant(s) | For all designated states International Business Machines Corporation New Orchard Road Armonk, NY 10504 / US | [N/P] |
| Former [1984/50] | For all designated states International Business Machines Corporation Old Orchard Road Armonk, N.Y. 10504 / US | Inventor(s) | 01 /
Oliver, Burton Laverne R.D. 1, Box 153 Newark Valley New York 13811 / US | 02 /
Preston, David Charles R.D. 1, Box 112F Newark Valley New York 13811 / US | [1984/50] | Representative(s) | Lewit, Leonard, et al IBM Deutschland GmbH Schönaicher Strasse 220 D-7030 Böblingen / DE | [N/P] |
| Former [1988/23] | Lewit, Leonard, Dipl.-Ing., et al IBM Deutschland GmbH Schönaicher Strasse 220 D-7030 Böblingen / DE | ||
| Former [1984/50] | Lewit, Leonard, Dipl.-Ing. IBM Deutschland GmbH Schönaicher Strasse 220 D-7030 Böblingen / DE | Application number, filing date | 84105754.0 | 21.05.1984 | [1984/50] | Priority number, date | US19830500501 | 02.06.1983 Original published format: US 500501 | [1984/50] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0127830 | Date: | 12.12.1984 | Language: | EN | [1984/50] | Type: | A3 Search report | No.: | EP0127830 | Date: | 16.03.1988 | Language: | EN | [1988/11] | Type: | B1 Patent specification | No.: | EP0127830 | Date: | 09.01.1991 | Language: | EN | [1991/02] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 25.01.1988 | Classification | IPC: | G06F13/40 | [1988/05] | CPC: |
G06F13/4018 (EP,US)
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| Former IPC [1984/50] | G06F3/04 | Designated contracting states | DE, FR, GB [1984/50] | Title | German: | Mikroprozessorsystem mit einem Mehrfachbyte-Systembus | [1984/50] | English: | Microprocessor system with a multibyte system bus | [1984/50] | French: | Système à microprocesseur avec un bus de système à plusieurs multiplets | [1984/50] | File destroyed: | 03.03.2001 | Examination procedure | 23.11.1984 | Examination requested [1985/06] | 26.03.1990 | Despatch of communication of intention to grant (Approval: Yes) | 15.06.1990 | Communication of intention to grant the patent | 22.06.1990 | Fee for grant paid | 22.06.1990 | Fee for publishing/printing paid | Opposition(s) | 10.10.1991 | No opposition filed within time limit [1992/01] | Fees paid | Renewal fee | 23.05.1986 | Renewal fee patent year 03 | 29.05.1987 | Renewal fee patent year 04 | 31.05.1988 | Renewal fee patent year 05 | 30.05.1989 | Renewal fee patent year 06 | 19.05.1990 | Renewal fee patent year 07 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A] JP57111733 | [A] COMPUTER DESIGN, vol. 21, no. 4, April 1982,pages 149-154, Winchester, Mass. US; D. HOFFMAN et al.: "A cluster communications i/o processor" [A] | [A] PATENT ABSTRACTS OF JAPAN, vol. 6, no. 206 (P-149)[1084], 19th October 1982; & JP-A-57 111 733 (PANA FACOM K.K.) 12-07-1982 [A] |