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EP0130417
European procedure
Extract from the Register of European Patents
EP About this file: EP0130417
| EP0130417 - A method of fabricating an electrical interconnection structure for an integrated circuit module [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 18.07.1989 Database last updated on 19.10.2024 | Most recent event Tooltip | 18.07.1989 | No opposition filed within time limit | published on 06.09.1989 [1989/36] | Applicant(s) | For all designated states International Business Machines Corporation New Orchard Road Armonk, NY 10504 / US | [N/P] |
| Former [1985/02] | For all designated states International Business Machines Corporation Old Orchard Road Armonk, N.Y. 10504 / US | Inventor(s) | 01 /
Bhattacharyya, Arup 18 Glenwood Drive Essex Junction Vermont 05452 / US | 02 /
Wen Ho, Chung 49 Tanglewild Road Chappaqua New York 10514 / US | [1985/02] | Representative(s) | Hobbs, Francis John IBM United Kingdom Limited Intellectual Property Department Hursley Park Winchester Hampshire SO21 2JN / GB | [N/P] |
| Former [1987/51] | Hobbs, Francis John IBM United Kingdom Limited Intellectual Property Department Hursley Park Winchester Hampshire SO21 2JN / GB | ||
| Former [1985/02] | Lewis, Alan John IBM United Kingdom Limited Intellectual Property Department Hursley Park Winchester Hampshire SO21 2JN / GB | Application number, filing date | 84106539.4 | 08.06.1984 | [1985/02] | Priority number, date | US19830509513 | 30.06.1983 Original published format: US 509513 | [1985/02] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0130417 | Date: | 09.01.1985 | Language: | EN | [1985/02] | Type: | A3 Search report | No.: | EP0130417 | Date: | 30.04.1986 | Language: | EN | [1986/18] | Type: | B1 Patent specification | No.: | EP0130417 | Date: | 21.09.1988 | Language: | EN | [1988/38] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 13.03.1986 | Classification | IPC: | H05K3/46, H05K3/40 | [1986/19] | CPC: |
H05K3/4076 (EP,US);
H01L21/4857 (EP,US);
H01L2224/16 (EP,US);
H01L2924/01079 (EP,US);
H01L2924/15312 (EP,US);
H05K2201/0154 (EP,US);
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| Former IPC [1985/02] | H05K3/46 | Designated contracting states | DE, FR, GB [1985/02] | Title | German: | Verfahren zur Herstellung eines elektrischen Verbindungsaufbaus für ein integriertes Schaltmodul | [1985/02] | English: | A method of fabricating an electrical interconnection structure for an integrated circuit module | [1985/02] | French: | Méthode pour fabriquer une structure électrique de connexion intermédiaire pour un module intégré | [1985/02] | File destroyed: | 15.01.2000 | Examination procedure | 23.11.1984 | Examination requested [1985/06] | 14.10.1987 | Despatch of communication of intention to grant (Approval: Yes) | 30.12.1987 | Communication of intention to grant the patent | 12.01.1988 | Fee for grant paid | 12.01.1988 | Fee for publishing/printing paid | Opposition(s) | 22.06.1989 | No opposition filed within time limit [1989/36] | Fees paid | Renewal fee | 24.06.1986 | Renewal fee patent year 03 | 23.06.1987 | Renewal fee patent year 04 | 21.06.1988 | Renewal fee patent year 05 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [XP]EP0091075 (CIT ALCATEL [FR]); | [A]DE2303158 (HITACHI LTD); | [A]US3913223 (GIGOUX CLAUDE); | [AD]US3780352 (REDWANZ J); | [AD]US3832769 (OLYPHANT M, et al); | [AD]US3471631 (QUINTANA LEO J) |