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EP0135759
European procedure
Extract from the Register of European Patents
EP About this file: EP0135759
| EP0135759 - Circuit arrangement for the conversion of an input voltage lying within a predetermined frequency range of operation into a proportional output voltage [Right-click to bookmark this link] | |||
| Former [1985/28] | Circuit arrangement for the conversion of an input voltage into a proportional output signal | ||
| [1988/29] | Status | No opposition filed within time limit Status updated on 23.05.1989 Database last updated on 26.03.2026 | Most recent event Tooltip | 29.11.1989 | Lapse of the patent in a contracting state | published on 17.01.1990 [1990/03] | Applicant(s) | For all designated states BBC Brown Boveri AG Haselstrasse CH-5401 Baden / CH | [1987/39] |
| Former [1985/14] | For all designated states BBC Aktiengesellschaft Brown, Boveri & Cie. Haselstrasse CH-5401 Baden / CH | Inventor(s) | 01 /
Maschek, Martin Juchstrasse 10 CH-8116 Würenlos / CH | 02 /
Mastner, Georg, Dr. Lohnstrasse 5 CH-5443 Niederrohrdorf / CH | [1985/14] | Application number, filing date | 84109467.5 | 09.08.1984 | [1985/14] | Priority number, date | CH19830005152 | 22.09.1983 Original published format: CH 515283 | [1985/14] | Filing language | DE | Procedural language | DE | Publication | Type: | A2 Application without search report | No.: | EP0135759 | Date: | 03.04.1985 | Language: | DE | [1985/14] | Type: | A3 Search report | No.: | EP0135759 | Date: | 12.06.1985 | Language: | DE | [1985/24] | Type: | B1 Patent specification | No.: | EP0135759 | Date: | 20.07.1988 | Language: | DE | [1988/29] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 10.04.1985 | Classification | IPC: | H03H11/24, H03G3/20 | [1985/14] | CPC: |
H03G3/3015 (EP,US);
H03H11/245 (EP,US)
| Designated contracting states | CH, DE, FR, LI, SE [1985/14] | Title | German: | Schaltungsanordnung zur Umsetzung einer in einem vorgegebenen Arbeitsfrequenzbereich liegenden Eingangsspannung in eine proportionale Ausgangsspannung | [1988/29] | English: | Circuit arrangement for the conversion of an input voltage lying within a predetermined frequency range of operation into a proportional output voltage | [1988/29] | French: | Montage pour la conversion d'une tension d'entrée située dans une bande de fréquence d'operation prédeterminée en une tension de sortie proportionnel | [1988/29] |
| Former [1985/14] | Schaltungsanordnung zur Umsetzung einer Eingangsspannung in ein proportionales Ausgangssignal | ||
| Former [1985/28] | Circuit arrangement for the conversion of an input voltage into a proportional output signal | ||
| Former [1985/28] | Montage pour la conversion d'une tension d'entrée en un signal de sortie proportionnel | File destroyed: | 17.07.1996 | Examination procedure | 28.06.1985 | Examination requested [1985/37] | 07.11.1986 | Despatch of a communication from the examining division (Time limit: M04) | 24.02.1987 | Reply to a communication from the examining division | 17.03.1987 | Despatch of a communication from the examining division (Time limit: M04) | 26.06.1987 | Reply to a communication from the examining division | 14.10.1987 | Despatch of communication of intention to grant (Approval: Yes) | 14.12.1987 | Communication of intention to grant the patent | 02.03.1988 | Fee for grant paid | 02.03.1988 | Fee for publishing/printing paid | Opposition(s) | 21.04.1989 | No opposition filed within time limit [1989/28] | Fees paid | Renewal fee | 27.08.1986 | Renewal fee patent year 03 | 27.07.1987 | Renewal fee patent year 04 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Lapses during opposition Tooltip | CH | 31.08.1988 | LI | 31.08.1988 | [1990/03] | Documents cited: | Search | [A] JP52144250 | [A] JP57017214 | [A] PATENTS ABSTRACTS OF JAPAN, Band 2, Nr. 35, 9. Marz 1978, Seite 11696 E 77; & JP-A-52 144 250 ( NIPPON DENKI K.K. ) ( 01.12.1977 ) [A] | [A] PATENTS ABSTRACTS OF JAPAN, Band 6, Nr. 81 (E-107) (959), 19. Marz 1982; & JP-A-57 017 214 ( MITSUBISHI DENKI K.K. ) ( 28.01.1982 ) [A] | [A] ELECTRONIC DESIGN, Band 26, Nr. 15, 19. Juli 1978, Seiten 68-73, ROCHELLE PARK, (US). S. MOORE: "Control analog signals with voltage. FETs, operated as voltage-controlled resistors, can deliver almost any level of performance you may need". [A] |