Extract from the Register of European Patents

EP About this file: EP0145004

EP0145004 - Bipolar Transistor-Field Effect Transistor Composite Circuit [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  24.08.1991
Database last updated on 08.04.2026
Most recent event   Tooltip24.08.1991No opposition filed within time limitpublished on 16.10.1991 [1991/42]
Applicant(s)For all designated states
Hitachi, Ltd.
6, Kanda Surugadai 4-chome
Chiyoda-ku
Tokyo / JP
[N/P]
Former [1985/25]For all designated states
HITACHI, LTD.
6, Kanda Surugadai 4-chome
Chiyoda-ku, Tokyo 100 / JP
Inventor(s)01 / Iwamura, Masahiro
1-10-9, Hanayamacho
Hitachi-shi / JP
02 / Masuda, Ikuro
Moriyamacho-2-chome
Hitachi-shi / JP
[1985/25]
Representative(s)Strehl & Partner mbB
Maximilianstrasse 54
80538 München / DE
[N/P]
Former [1985/25]Strehl Schübel-Hopf Groening & Partner
Maximilianstrasse 54
D-80538 München / DE
Application number, filing date84115098.010.12.1984
[1985/25]
Priority number, dateJP1983023275012.12.1983         Original published format: JP 23275083
[1985/25]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0145004
Date:19.06.1985
Language:EN
[1985/25]
Type: A3 Search report 
No.:EP0145004
Date:19.08.1987
Language:EN
[1987/34]
Type: B1 Patent specification 
No.:EP0145004
Date:24.10.1990
Language:EN
[1990/43]
Search report(s)(Supplementary) European search report - dispatched on:EP30.06.1987
ClassificationIPC:H03K19/094
[1985/25]
CPC:
H03K19/09448 (EP,US); H03K19/00 (KR)
Designated contracting statesDE,   FR,   GB,   IT [1985/25]
TitleGerman:Kombinierte Bipolartransistor-Feldeffekttransistor-Schaltung[1990/43]
English:Bipolar Transistor-Field Effect Transistor Composite Circuit[1985/25]
French:Circuit composite, transistors bipolaires-transistors à effet de champ[1985/32]
Former [1985/32]Zusammengesetzte Bipolar-Feldeffekttransistor-Schaltung
Examination procedure20.12.1984Examination requested  [1985/25]
20.09.1988Despatch of a communication from the examining division (Time limit: M08)
29.05.1989Reply to a communication from the examining division
10.07.1989Despatch of a communication from the examining division (Time limit: M04)
16.11.1989Reply to a communication from the examining division
11.01.1990Despatch of communication of intention to grant (Approval: No)
29.03.1990Despatch of communication of intention to grant (Approval: later approval)
27.04.1990Communication of intention to grant the patent
29.06.1990Fee for grant paid
29.06.1990Fee for publishing/printing paid
Opposition(s)25.07.1991No opposition filed within time limit [1991/42]
Fees paidRenewal fee
30.12.1986Renewal fee patent year 03
29.12.1987Renewal fee patent year 04
23.12.1988Renewal fee patent year 05
28.12.1989Renewal fee patent year 06
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Documents cited:Search[AD]   IEEE TRANSACTIONS ON ELECTRON DEVICES, vol. ED-16, no. 11, November 1969, pages 945-951, New York, US; H.C. LIN et al.: "Complementary MOS-Bipolar transistor structure" [AD]
 [A]   IBM TECHNICAL DISCLOSURE BULLETIN, vol. 8, no. 2, July 1965, pages 317-318, New York, US; L.W. ATWOOD: "Logic circuit" [A]
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