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EP0132122
European procedure
Extract from the Register of European Patents
EP About this file: EP0132122
| EP0132122 - Apparatus for inspecting mask for use in manufacturing large scale integrated circuits [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 13.09.1989 Database last updated on 02.07.2024 | Most recent event Tooltip | 13.09.1989 | No opposition filed within time limit | published on 02.11.1989 [1989/44] | Applicant(s) | For all designated states Kabushiki Kaisha Toshiba 72, Horikawa-cho, Saiwai-ku Kawasaki-shi Kanagawa-ken 210-8572 / JP | [N/P] |
| Former [1985/04] | For all designated states KABUSHIKI KAISHA TOSHIBA 72, Horikawa-cho, Saiwai-ku Kawasaki-shi, Kanagawa-ken 210, Tokyo / JP | Inventor(s) | 01 /
Ikenaga, Osamu c/o Patent Division Kabushiki Kaisha Toshiba 1-1 Shibaura 1-chome Minato-ku Tokyo 105 / JP | 02 /
Yoshikawa, Ryoichi c/o Patent Division Kabushiki Kaisha Toshiba 1-1 Shibaura 1-chome Minato-ku Tokyo 105 / JP | [1985/04] | Representative(s) | Freed, Arthur Woolf, et al Marks & Clerk Incorporating Edward Evans Barker 90 Long Acre London WC2E 9RA / GB | [N/P] |
| Former [1985/04] | Freed, Arthur Woolf, et al MARKS & CLERK, 57-60 Lincoln's Inn Fields London WC2A 3LS / GB | Application number, filing date | 84304754.9 | 11.07.1984 | [1985/04] | Priority number, date | JP19830128913 | 15.07.1983 Original published format: JP 12891383 | [1985/04] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0132122 | Date: | 23.01.1985 | Language: | EN | [1985/04] | Type: | A3 Search report | No.: | EP0132122 | Date: | 18.09.1985 | Language: | EN | [1985/38] | Type: | B1 Patent specification | No.: | EP0132122 | Date: | 09.11.1988 | Language: | EN | [1988/45] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 17.07.1985 | Classification | IPC: | G01N21/88 | [1985/04] | CPC: |
G01N21/956 (EP);
G03F1/84 (EP);
H01L21/30 (EP)
| Designated contracting states | DE, FR, GB [1988/45] |
| Former [1985/04] | DE, FR, GB, NL | Title | German: | Apparat zur Untersuchung von Masken für die Herstellung von hochgradig integrierten Schaltungen | [1985/04] | English: | Apparatus for inspecting mask for use in manufacturing large scale integrated circuits | [1985/04] | French: | Appareil pour l'inspection de masques utilisés dans la réalisation de circuits intégrés à haute densité | [1985/04] | Examination procedure | 30.07.1984 | Examination requested [1985/04] | 29.01.1987 | Despatch of a communication from the examining division (Time limit: M04) | 11.05.1987 | Reply to a communication from the examining division | 11.02.1988 | Despatch of communication of intention to grant (Approval: No) | 22.04.1988 | Despatch of communication of intention to grant (Approval: later approval) | 11.05.1988 | Communication of intention to grant the patent | 10.08.1988 | Fee for grant paid | 10.08.1988 | Fee for publishing/printing paid | Opposition(s) | 10.08.1989 | No opposition filed within time limit [1989/44] | Fees paid | Renewal fee | 10.07.1986 | Renewal fee patent year 03 | 07.07.1987 | Renewal fee patent year 04 | 13.07.1988 | Renewal fee patent year 05 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [AD]EP0114517 ; | [AD]EP0105661 ; | [A]GB2076533 ; | [A]EP0066466 ; | [A]EP0054596 | [A] - IBM JOURNAL OF RESEARCH AND DEVELOPMENT, vol. 27, no. 1, January 1983, pages 50-58, New York, US; M.A. WEST et al.: "Computer-controlled optical testing of high-density printed-circuit boards" | [A] - REVIEW OF THE ELECTRICAL COMMUNICATION LABORATORIES, vol. 30, no. 6, 1982, pages 1076-1085, Tokyo, JP; B. TSUJIYAMA et al.: "An automated mask defect inspection system" |