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EP0172311
European procedure
Extract from the Register of European Patents
EP About this file: EP0172311
| EP0172311 - Memory element for a wafer scale integrated circuit [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 23.05.1990 Database last updated on 15.06.2024 | Most recent event Tooltip | 23.05.1990 | No opposition filed within time limit | published on 11.07.1990 [1990/28] | Applicant(s) | For all designated states UNISYS CORPORATION 1, Burroughs Place Detroit Michigan 48232 / US | [N/P] |
| Former [1987/27] | For all designated states UNISYS CORPORATION 1, Burroughs Place Detroit Michigan 48232 / US | ||
| Former [1986/09] | For all designated states BURROUGHS CORPORATION (a Delaware corporation) Burroughs Place Detroit Michigan 48232 / US | Inventor(s) | 01 /
Chamberlain, John Terence 8 Manley Road Macclesfield Cheshire SK11 7UU / GB | [1986/09] | Representative(s) | Kirby, Harold Douglas Benson, et al G.F. Redfern & Company Marlborough Lodge 14 Farncombe Road Worthing West Sussex BN11 2BT / GB | [N/P] |
| Former [1986/09] | Kirby, Harold Douglas Benson, et al G.F. Redfern & Company Marlborough Lodge 14 Farncombe Road Worthing West Sussex BN11 2BT / GB | Application number, filing date | 85104574.0 | 18.12.1981 | [1986/09] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0172311 | Date: | 26.02.1986 | Language: | EN | [1986/09] | Type: | A3 Search report | No.: | EP0172311 | Date: | 06.04.1988 | Language: | EN | [1988/14] | Type: | B1 Patent specification | No.: | EP0172311 | Date: | 26.07.1989 | Language: | EN | [1989/30] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 15.02.1988 | Classification | IPC: | G01R31/28, G06F11/20 | [1988/10] | CPC: |
G11C29/006 (EP)
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| Former IPC [1986/09] | G01R31/28, G11C29/00 | Designated contracting states | BE, CH, DE, FR, LI, NL, SE [1986/09] | Title | German: | Speicherelement für in Plättchenform integrierte Schaltungen | [1986/09] | English: | Memory element for a wafer scale integrated circuit | [1986/09] | French: | Elément de mémoire pour des circuits sous forme de pastille | [1986/09] | File destroyed: | 20.04.2002 | Examination procedure | 25.04.1985 | Examination requested [1986/09] | 02.08.1988 | Despatch of a communication from the examining division (Time limit: M04) | 20.08.1988 | Reply to a communication from the examining division | 21.11.1988 | Despatch of communication of intention to grant (Approval: Yes) | 05.01.1989 | Communication of intention to grant the patent | 23.02.1989 | Fee for grant paid | 23.02.1989 | Fee for publishing/printing paid | Parent application(s) Tooltip | EP82900118.9 / EP0096027 | Opposition(s) | 27.04.1990 | No opposition filed within time limit [1990/28] | Fees paid | Renewal fee | 23.09.1985 | Renewal fee patent year 03 | 23.09.1985 | Renewal fee patent year 04 | 28.10.1985 | Renewal fee patent year 05 | 01.12.1986 | Renewal fee patent year 06 | 21.11.1987 | Renewal fee patent year 07 | 22.11.1988 | Renewal fee patent year 08 | Penalty fee | Additional fee for renewal fee | 16.04.1985 | 03 M06 Fee paid on 23.09.1985 | 16.04.1985 | 04 M06 Fee paid on 23.09.1985 |
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