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EP0171190
European procedure
Extract from the Register of European Patents
EP About this file: EP0171190
| EP0171190 - Extended-function arithmetic-logic unit [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 01.04.1995 Database last updated on 05.10.2024 | Most recent event Tooltip | 28.09.2007 | Lapse of the patent in a contracting state | published on 31.10.2007 [2007/44] | Applicant(s) | For all designated states ADVANCED MICRO DEVICES, INC. 901 Thompson Place P.O. Box 3453 Sunnyvale CA 94088-3453 / US | [N/P] |
| Former [1986/07] | For all designated states ADVANCED MICRO DEVICES, INC. 901 Thompson Place P.O. Box 3453 Sunnyvale, CA 94088 / US | Inventor(s) | 01 /
Chu, Paul 1442 Firebird Way Sunnyvale California 94087 / US | 02 /
Mithani, Deepak 2945 Murman Court San Jose California / US | 03 /
Iyer, Sanjay 3560 Pleasant Crest Drive San Jose California 95148 / US | [1986/07] | Representative(s) | Wright, Hugh Ronald, et al Brookes Batchellor LLP 1 Boyne Park Tunbridge Wells Kent TN4 8EL / GB | [N/P] |
| Former [1986/07] | Wright, Hugh Ronald, et al Brookes & Martin 52/54 High Holborn London WC1V 6SE / GB | Application number, filing date | 85304839.5 | 08.07.1985 | [1986/07] | Priority number, date | US19840628921 | 09.07.1984 Original published format: US 628921 | [1986/07] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0171190 | Date: | 12.02.1986 | Language: | EN | [1986/07] | Type: | A3 Search report | No.: | EP0171190 | Date: | 23.11.1989 | Language: | EN | [1989/47] | Type: | B1 Patent specification | No.: | EP0171190 | Date: | 01.06.1994 | Language: | EN | [1994/22] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 04.10.1989 | Classification | IPC: | G06F7/48, G06F9/30 | [1986/07] | CPC: |
G06F7/764 (EP,US);
G06F7/57 (EP,US);
G06F2207/3816 (EP,US);
G06F2207/382 (EP,US);
G06F2207/3856 (EP,US);
G06F7/4991 (EP,US)
| Designated contracting states | AT, BE, CH, DE, FR, GB, IT, LI, LU, NL, SE [1986/07] | Title | German: | Arithmetische und logische Einheit mit erweiterter Funktion | [1986/07] | English: | Extended-function arithmetic-logic unit | [1986/07] | French: | Unité arithmétique et logique à fonction étendue | [1986/07] | Examination procedure | 02.03.1990 | Examination requested [1990/18] | 31.10.1991 | Despatch of a communication from the examining division (Time limit: M06) | 02.04.1992 | Reply to a communication from the examining division | 22.05.1992 | Despatch of a communication from the examining division (Time limit: M04) | 01.10.1992 | Reply to a communication from the examining division | 06.11.1992 | Despatch of a communication from the examining division (Time limit: M02) | 07.11.1992 | Reply to a communication from the examining division | 09.02.1993 | Despatch of a communication from the examining division (Time limit: M02) | 25.03.1993 | Reply to a communication from the examining division | 11.08.1993 | Despatch of communication of intention to grant (Approval: Yes) | 25.11.1993 | Communication of intention to grant the patent | 17.02.1994 | Fee for grant paid | 17.02.1994 | Fee for publishing/printing paid | Opposition(s) | 02.03.1995 | No opposition filed within time limit [1995/21] | Fees paid | Renewal fee | 26.06.1987 | Renewal fee patent year 03 | 19.07.1988 | Renewal fee patent year 04 | 06.07.1989 | Renewal fee patent year 05 | 19.07.1990 | Renewal fee patent year 06 | 22.07.1991 | Renewal fee patent year 07 | 16.07.1992 | Renewal fee patent year 08 | 19.06.1993 | Renewal fee patent year 09 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Lapses during opposition Tooltip | AT | 01.06.1994 | BE | 01.06.1994 | CH | 01.06.1994 | IT | 01.06.1994 | LI | 01.06.1994 | LU | 31.07.1994 | SE | 01.09.1994 | [2007/44] |
| Former [2000/05] | AT | 01.06.1994 | |
| BE | 01.06.1994 | ||
| CH | 01.06.1994 | ||
| IT | 01.06.1994 | ||
| LI | 01.06.1994 | ||
| LU | 31.07.1994 | ||
| SE | 01.09.1994 | ||
| Former [1999/42] | AT | 01.06.1994 | |
| BE | 01.06.1994 | ||
| CH | 01.06.1994 | ||
| IT | 01.06.1994 | ||
| LI | 01.06.1994 | ||
| SE | 01.09.1994 | ||
| Former [1995/15] | AT | 01.06.1994 | |
| BE | 01.06.1994 | ||
| CH | 01.06.1994 | ||
| LI | 01.06.1994 | ||
| SE | 01.09.1994 | ||
| Former [1995/12] | BE | 01.06.1994 | |
| CH | 01.06.1994 | ||
| LI | 01.06.1994 | ||
| SE | 01.09.1994 | ||
| Former [1995/05] | CH | 01.06.1994 | |
| LI | 01.06.1994 | ||
| SE | 01.09.1994 | ||
| Former [1995/02] | CH | 01.06.1994 | |
| LI | 01.06.1994 | Documents cited: | Search | [Y]FR2144306 (BURROUGHS CORP); | [A]EP0044450 (INT COMPUTERS LTD [GB]) | [A] - IBM TECHNICAL DISCLOSURE BULLETIN, vol. 27, no. 1B, June 1984, pages 747-750, New York, US; J.W. CANNON et al.: "ALU merge operation" | [A] - IBM TECHNICAL DISCLOSURE BULLETIN, vol. 23, no. 1, June 1980, pages 149-150, New York, US; C.B. STEIGLITZ: "Mask generator" | [A] - IEEE ELECTRO, vol. 8, 1983, pages 1-5, New York, US; B.J. NEW: "Address generation in signal/array processors" | [Y] - ELECTRONIC DESIGN, vol. 32, no. 10, May 1984, pages 135-144, Waseca, MN, Denville, NJ, US; D. GARDE et al.: "16-bit-slice family creates ultrafast digital signal processors" | [A] - ELECTRONIC DESIGN, vol. 29, no. 25, 10th December 1981, pages 104-112, Denville, US; M.J. MILLER et al.: "Bit-slice processor speeds through BCD math" |