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EP0171308
European procedure
Extract from the Register of European Patents
EP About this file: EP0171308
| EP0171308 - Logic system failure or correct operation simulation device [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 14.09.1991 Database last updated on 17.07.2024 | Most recent event Tooltip | 23.11.2007 | Lapse of the patent in a contracting state New state(s): IT | published on 26.12.2007 [2007/52] | Applicant(s) | For all designated states COMMISSARIAT A L'ENERGIE ATOMIQUE 31/33, rue de la Fédération 75015 Paris Cédex 15 / FR | [N/P] |
| Former [1988/03] | For all designated states COMMISSARIAT A L'ENERGIE ATOMIQUE 31/33, rue de la Fédération F-75015 Paris Cédex 15 / FR | ||
| Former [1986/07] | For all designated states COMMISSARIAT A L'ENERGIE ATOMIQUE Etablissement de Caractère Scientifique Technique et Industriel 31/33, rue de la Fédération F-75015 Paris / FR | Inventor(s) | 01 /
Laviron, André 15, rue des Champs Viaux Daix F-21121 Fontaine les Dijon / FR | [1986/07] | Representative(s) | Mongrédien, André, et al c/o BREVATOME 25, rue de Ponthieu F-75008 Paris / FR | [1986/07] | Application number, filing date | 85401320.8 | 28.06.1985 | [1986/07] | Priority number, date | FR19840010516 | 03.07.1984 Original published format: FR 8410516 | [1986/07] | Filing language | FR | Procedural language | FR | Publication | Type: | A1 Application with search report | No.: | EP0171308 | Date: | 12.02.1986 | Language: | FR | [1986/07] | Type: | B1 Patent specification | No.: | EP0171308 | Date: | 14.11.1990 | Language: | FR | [1990/46] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 26.11.1985 | Classification | IPC: | G06F15/20 | [1986/07] | CPC: |
G06F11/261 (EP,US);
G06F30/33 (EP,US)
| Designated contracting states | BE, DE, GB, IT, NL [1986/07] | Title | German: | Vorrichtung zur Simulation von fehlerhaftem oder fehlerfreiem Betrieb in einem logischen System | [1986/07] | English: | Logic system failure or correct operation simulation device | [1986/07] | French: | Dispositif de simulation de la défaillance ou du bon fonctionnement d'un système logique | [1986/07] | File destroyed: | 15.01.2000 | Examination procedure | 10.07.1986 | Examination requested [1986/37] | 13.12.1988 | Despatch of a communication from the examining division (Time limit: M04) | 31.03.1989 | Reply to a communication from the examining division | 14.04.1989 | Despatch of a communication from the examining division (Time limit: M02) | 26.05.1989 | Reply to a communication from the examining division | 28.07.1989 | Despatch of a communication from the examining division (Time limit: M02) | 20.09.1989 | Reply to a communication from the examining division | 30.01.1990 | Despatch of communication of intention to grant (Approval: Yes) | 15.05.1990 | Communication of intention to grant the patent | 28.06.1990 | Fee for grant paid | 28.06.1990 | Fee for publishing/printing paid | Opposition(s) | 15.08.1991 | No opposition filed within time limit [1991/45] | Fees paid | Renewal fee | 20.06.1987 | Renewal fee patent year 03 | 20.06.1988 | Renewal fee patent year 04 | 22.06.1989 | Renewal fee patent year 05 | 19.06.1990 | Renewal fee patent year 06 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Lapses during opposition Tooltip | IT | 14.11.1990 | NL | 14.11.1990 | [1999/42] |
| Former [1991/45] | NL | 14.11.1990 | Documents cited: | Search | [A]US3702011 (ARMSTRONG DOUGLAS BYRON); | [A]US3649910 (VINSANI MARIO, et al); | [A]FR2030438 (GEN ELECTRIC ITALIA) | [AD] - IEEE TRANSACTIONS ON RELIABILITY, vol. R-29, no. 1, avril 1980, pages 2-9, IEEE, New York, US; P.K. ANDOW: "Difficulties in fault-tree synthesis for process plant" |