EP0195445 - Semiconductor memory device with an error correction function [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 06.08.1994 Database last updated on 24.04.2024 | Most recent event Tooltip | 06.08.1994 | No opposition filed within time limit | published on 28.09.1994 [1994/39] | Applicant(s) | For all designated states Kabushiki Kaisha Toshiba 72, Horikawa-cho, Saiwai-ku Kawasaki-shi Kanagawa-ken 210-8572 / JP | [N/P] |
Former [1986/39] | For all designated states KABUSHIKI KAISHA TOSHIBA 72, Horikawa-cho, Saiwai-ku Kawasaki-shi, Kanagawa-ken 210, Tokyo / JP | Inventor(s) | 01 /
Ohsawa, Takashi c/o Patent Division K.K. Toshiba 1-1 Shibaura 1-chome Minato-ku Tokyo 105 / JP | [1986/39] | Representative(s) | Hoffmann, Klaus, et al Hoffmann Eitle, Patent- und Rechtsanwälte, Postfach 81 04 20 81904 München / DE | [N/P] |
Former [1989/17] | Hoffmann, Klaus, Dr. rer. nat., et al Hoffmann, Eitle & Partner Patentanwälte Postfach 81 04 20 D-81904 München / DE | ||
Former [1986/39] | Hoffmann, Klaus, Dr. rer. nat. Hoffmann, Eitle & Partner, Patentanwälte, Postfach 81 04 20 D-81925 München / DE | Application number, filing date | 86103788.5 | 20.03.1986 | [1986/39] | Priority number, date | JP19850056515 | 20.03.1985 Original published format: JP 5651585 | [1986/39] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0195445 | Date: | 24.09.1986 | Language: | EN | [1986/39] | Type: | A3 Search report | No.: | EP0195445 | Date: | 18.01.1989 | Language: | EN | [1989/03] | Type: | B1 Patent specification | No.: | EP0195445 | Date: | 06.10.1993 | Language: | EN | [1993/40] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 01.12.1988 | Classification | IPC: | G06F11/00 | [1986/39] | CPC: |
G06F11/1008 (EP,US);
G06F11/1076 (EP,US)
| Designated contracting states | DE, FR, GB [1986/39] | Title | German: | Halbleiterspeichergerät mit einer Korrekturfunktion | [1986/39] | English: | Semiconductor memory device with an error correction function | [1986/39] | French: | Dispositif de mémoire à semi-conducteur munie d'une fonction de correction d'erreurs | [1986/39] | Examination procedure | 20.03.1986 | Examination requested [1986/39] | 09.10.1990 | Despatch of a communication from the examining division (Time limit: M06) | 09.04.1991 | Reply to a communication from the examining division | 29.04.1991 | Despatch of a communication from the examining division (Time limit: M06) | 30.10.1991 | Reply to a communication from the examining division | 01.12.1992 | Despatch of communication of intention to grant (Approval: Yes) | 07.04.1993 | Communication of intention to grant the patent | 01.07.1993 | Fee for grant paid | 01.07.1993 | Fee for publishing/printing paid | Opposition(s) | 07.07.1994 | No opposition filed within time limit [1994/39] | Fees paid | Renewal fee | 07.03.1988 | Renewal fee patent year 03 | 13.03.1989 | Renewal fee patent year 04 | 15.03.1990 | Renewal fee patent year 05 | 17.12.1990 | Renewal fee patent year 06 | 13.03.1992 | Renewal fee patent year 07 | 09.03.1993 | Renewal fee patent year 08 |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]JP57162195 ; | [X]US4412314 (PROEBSTING ROBERT J [US]); | [A]GB2075730 (DATA GENERAL CORP); | [A]US4493081 (SCHMIDT FREDERICK W [US]) | [A] - PATENT ABSTRACTS OF JAPAN, vol. 7, no. 2 (P-166)[1147], 7th January 1983; & JP-A-57 162 195 (KIYOUSAN SEISAKUSHO K.K.) 05-10-1982, & JP57162195 A 00000000 |