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Extract from the Register of European Patents

EP About this file: EP0213299

EP0213299 - Method for manufacturing a semiconductor device having an element isolation area [Right-click to bookmark this link]
StatusThe application has been withdrawn
Status updated on  19.01.1989
Database last updated on 30.07.2024
Most recent event   Tooltip07.07.2007Change - inventorpublished on 08.08.2007  [2007/32]
Applicant(s)For all designated states
Kabushiki Kaisha Toshiba
72, Horikawa-cho, Saiwai-ku Kawasaki-shi
Kanagawa-ken 210-8572 / JP
[N/P]
Former [1987/11]For all designated states
KABUSHIKI KAISHA TOSHIBA
72, Horikawa-cho, Saiwai-ku
Kawasaki-shi, Kanagawa-ken 210, Tokyo / JP
Inventor(s)01 / Kitahara, Koichi
c/o Patent Division K.K. Toshiba 1-1
Shibaura 1-chome Minato-ku Tokyo 105 / JP
[1987/11]
Representative(s)Eitle, Werner, et al
Hoffmann Eitle, Patent- und Rechtsanwälte, Postfach 81 04 20
81904 München / DE
[N/P]
Former [1987/11]Eitle, Werner, Dipl.-Ing., et al
Hoffmann, Eitle & Partner, Patent- und Rechtsanwälte, Postfach 81 04 20
D-81904 München / DE
Application number, filing date86108350.919.06.1986
[1987/11]
Priority number, dateJP1985013394021.06.1985         Original published format: JP 13394085
[1987/11]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0213299
Date:11.03.1987
Language:EN
[1987/11]
ClassificationIPC:H01L21/76
[1987/11]
CPC:
H01L21/76297 (EP); H01L21/187 (EP)
Designated contracting statesDE,   FR,   GB [1987/11]
TitleGerman:Verfahren zur Herstellung einer Halbleiteranordnung mit einer Isolationszone[1987/11]
English:Method for manufacturing a semiconductor device having an element isolation area[1987/11]
French:Procédé pour la fabrication d'un dispositif semi-conducteur comportant une région d'isolation[1987/11]
File destroyed:08.05.1995
Examination procedure19.06.1986Examination requested  [1987/11]
11.01.1989Application withdrawn by applicant  [1989/10]
Fees paidRenewal fee
14.06.1988Renewal fee patent year 03
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