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EP0215455
European procedure
Extract from the Register of European Patents
EP About this file: EP0215455
| EP0215455 - Write circuit for an erasable programmable read only memory device of a microcomputer [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 10.09.1992 Database last updated on 03.10.2024 | Most recent event Tooltip | 10.09.1992 | No opposition filed within time limit | published on 28.10.1992 [1992/44] | Applicant(s) | For all designated states FUJITSU LIMITED 1015, Kamikodanaka, Nakahara-ku Kawasaki-shi Kanagawa 211 / JP | [N/P] |
| Former [1987/13] | For all designated states FUJITSU LIMITED 1015, Kamikodanaka, Nakahara-ku Kawasaki-shi, Kanagawa 211 / JP | Inventor(s) | 01 /
Yamaguchi, Satoru FUJITSU LIMITED Patent Dpt. Kosugi Fujitsu Building 1812-10 Shimonumabe Nakahara-ku Kawasaki-shi Kanagawa 211 / JP | [1987/13] | Representative(s) | Sunderland, James Harry, et al Haseltine Lake LLP Lincoln House 300 High Holborn London WC1V 7JH / GB | [N/P] |
| Former [1987/13] | Sunderland, James Harry, et al HASELTINE LAKE & CO Hazlitt House 28 Southampton Buildings Chancery Lane London WC2A 1AT / GB | Application number, filing date | 86112640.7 | 12.09.1986 | [1987/13] | Priority number, date | JP19850206072 | 17.09.1985 Original published format: JP 20607285 | [1987/13] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0215455 | Date: | 25.03.1987 | Language: | EN | [1987/13] | Type: | A3 Search report | No.: | EP0215455 | Date: | 11.10.1989 | Language: | EN | [1989/41] | Type: | B1 Patent specification | No.: | EP0215455 | Date: | 06.11.1991 | Language: | EN | [1991/45] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 22.08.1989 | Classification | IPC: | G11C17/00 | [1987/13] | CPC: |
G11C16/08 (EP,US);
G11C7/00 (KR);
G11C16/32 (EP,US);
G11C17/00 (KR)
| Designated contracting states | DE, FR, GB [1987/13] | Title | German: | Schreibeschaltung für eine EPROM-Anordnung eines mikrorechners | [1987/13] | English: | Write circuit for an erasable programmable read only memory device of a microcomputer | [1987/13] | French: | Circuit d'écriture pour un dispositif EPROM d'un microcalculateur | [1987/13] | Examination procedure | 21.12.1989 | Examination requested [1990/09] | 04.02.1991 | Despatch of communication of intention to grant (Approval: No) | 23.04.1991 | Despatch of communication of intention to grant (Approval: later approval) | 30.04.1991 | Communication of intention to grant the patent | 19.07.1991 | Fee for grant paid | 19.07.1991 | Fee for publishing/printing paid | Opposition(s) | 07.08.1992 | No opposition filed within time limit [1992/44] | Fees paid | Renewal fee | 02.09.1988 | Renewal fee patent year 03 | 01.09.1989 | Renewal fee patent year 04 | 07.09.1990 | Renewal fee patent year 05 | 04.09.1991 | Renewal fee patent year 06 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]JP57133588 ; | [A]US4280199 (OSAKABE YOSHIO, et al) | [A] - PATENT ABSTRACTS OF JAPAN, vol. 6, no. 233 (P-156)[1111], 19th November 1982; & JP-A-57 133 588 (MITSUBISHI DENKI K.K.) 18-08-1982, & JP57133588 A 00000000 |