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EP0223690
European procedure
Extract from the Register of European Patents
EP About this file: EP0223690
| EP0223690 - Processor array with means to control cell processing state [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 30.11.1991 Database last updated on 24.04.2024 | Most recent event Tooltip | 30.11.1991 | No opposition filed within time limit | published on 22.01.1992 [1992/04] | Applicant(s) | For all designated states ALCATEL N.V. Strawinskylaan 537, (World Trade Center) NL-1077 XX Amsterdam / NL | [1989/08] |
| Former [1987/22] | For all designated states International Standard Electric Corporation 320 Park Avenue New York New York 10022 / US | Inventor(s) | 01 /
Morton, Steven Gregory 39 Old Good Hill Road Oxford, CT 06483 / US | [1987/22] | Representative(s) | Pothet, Jean Rémy Emile Ludovic, et al ALCATEL ALSTHOM, Département de Propriété Industrielle, 30, avenue Kléber 75116 Paris / FR | [N/P] |
| Former [1989/08] | Pothet, Jean Rémy Emile Ludovic, et al c/o SOSPI 14-16 rue de la Baume F-75008 Paris / FR | ||
| Former [1987/22] | Pothet, Jean c/o ITT Data Systems France S.A. Tour Maine Montparnasse 33, avenue du Maine F-75755 Paris Cédex 15 / FR | Application number, filing date | 86402466.6 | 04.11.1986 | [1987/22] | Priority number, date | US19850797718 | 13.11.1985 Original published format: US 797718 | [1987/22] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0223690 | Date: | 27.05.1987 | Language: | EN | [1987/22] | Type: | A3 Search report | No.: | EP0223690 | Date: | 27.07.1988 | Language: | EN | [1988/30] | Type: | B1 Patent specification | No.: | EP0223690 | Date: | 30.01.1991 | Language: | EN | [1991/05] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 06.06.1988 | Classification | IPC: | G06F15/16, G06F11/20 | [1991/05] | CPC: |
G06F15/8023 (EP);
G11C29/006 (EP)
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| Former IPC [1987/22] | G06F15/06 | Designated contracting states | DE, FR, GB, SE [1987/22] | Title | German: | Prozessorfeld mit Mittel zur Steuerung des Verarbeitungszustands der Zellen | [1987/22] | English: | Processor array with means to control cell processing state | [1987/22] | French: | Réseau de processeurs comportant des moyens de commande de l'état de traitement des cellules | [1987/22] | Examination procedure | 30.04.1987 | Examination requested [1987/27] | 03.03.1989 | Request for accelerated examination filed | 16.06.1989 | Despatch of a communication from the examining division (Time limit: M04) | 16.06.1989 | Decision about request for accelerated examination - accepted: Yes | 18.10.1989 | Reply to a communication from the examining division | 15.06.1990 | Despatch of communication of intention to grant (Approval: Yes) | 30.07.1990 | Communication of intention to grant the patent | 08.08.1990 | Fee for grant paid | 08.08.1990 | Fee for publishing/printing paid | Opposition(s) | 31.10.1991 | No opposition filed within time limit [1992/04] | Request for further processing for: | 03.03.1989 | Request for further processing filed | 03.03.1989 | Full payment received (date of receipt of payment) Request granted | 20.03.1989 | Decision despatched | Fees paid | Renewal fee | 24.10.1988 | Renewal fee patent year 03 | 14.10.1989 | Renewal fee patent year 04 | 24.10.1990 | Renewal fee patent year 05 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [X]EP0035647 (IBM [US]); | [A]EP0121763 (INT STANDARD ELECTRIC CORP [US]) | [X] - THE 5TH ANNUAL SYMPOSIUM ON COMPUTER ARCHITECTURE, 3th-5th April 1978, pages 230-235, IEEE, New York, US; P. CORSINI et al.: "The serial microprocessor array (SMA): microprogramming and application examples" | [X] - PROCEEDINGS OF THE NATIONAL ELECTRONICS CONFERENCE , Chicago, 9th-11th October 1972, vol. 27, pages 318-321, National Electronics Conference, Inc.; R. URBAN: "An airborne associative array processor" | [Y] - PROCEEDINGS OF THE 1982 INTERNATIONAL CONFERENCE ON PARALLEL PROCESSING, 24th-27th August 1982, pages 353-362, IEEE, New York, US; J. KUEHN et al.: "Design and simulation of an mc68000-based multimicroprocessor system" | [Y] - ELECTRONIC DESIGN, vol. 32, no. 23, 15 November 1984, pages 230-246, Waseca, MN, US; D. AJMERA et al.: "Bipolar building blocks deliver supermini speed to microcoded systems" | [A] - IBM TECHNICAL DISCLOSURE BULLETIN, vol. 22, no. 2, July 1979, pages 765-769, New York, US; G.R. MITCHELL: "Shift register shift-in-bit control" | by applicant | EP0035647 |