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EP0278079
European procedure
Extract from the Register of European Patents
EP About this file: EP0278079
| EP0278079 - NRZ Phase-locked loop circuit with associated monitor and recovery circuitry [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 26.01.1996 Database last updated on 19.03.2026 | Most recent event Tooltip | 23.11.2007 | Lapse of the patent in a contracting state | published on 26.12.2007 [2007/52] | Applicant(s) | For all designated states International Business Machines Corporation New Orchard Road Armonk, NY 10504 / US | [N/P] |
| Former [1988/33] | For all designated states International Business Machines Corporation Old Orchard Road Armonk, N.Y. 10504 / US | Inventor(s) | 01 /
Rizzo, Reymond Paul Sheedy Road Vestal New York 13850 / US | [1988/33] | Representative(s) | Jost, Ottokarl IBM Deutschland Informationssysteme GmbH, Patentwesen und Urheberrecht 70548 Stuttgart / DE | [N/P] |
| Former [1988/33] | Jost, Ottokarl, Dipl.-Ing. IBM Deutschland Informationssysteme GmbH, Patentwesen und Urheberrecht D-70548 Stuttgart / DE | Application number, filing date | 87117755.6 | 01.12.1987 | [1988/33] | Priority number, date | US19870013598 | 11.02.1987 Original published format: US 13598 | [1988/33] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0278079 | Date: | 17.08.1988 | Language: | EN | [1988/33] | Type: | A3 Search report | No.: | EP0278079 | Date: | 27.12.1989 | Language: | EN | [1989/52] | Type: | B1 Patent specification | No.: | EP0278079 | Date: | 22.03.1995 | Language: | EN | [1995/12] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 08.11.1989 | Classification | IPC: | H03L7/10, H03L7/08 | [1988/33] | CPC: |
H03L7/113 (EP,US);
H03L7/095 (EP,US);
Y10S331/02 (EP,US)
| Designated contracting states | DE, FR, GB, IT [1988/33] | Title | German: | NRZ-Phasenregelschleifenschaltung mit Monitor und Erholschaltungen dafür | [1988/33] | English: | NRZ Phase-locked loop circuit with associated monitor and recovery circuitry | [1988/33] | French: | Boucle d'asservissement de phase pour signal NRZ avec moniteur et circuit de recouvrement associés | [1988/33] | Examination procedure | 30.11.1988 | Examination requested [1989/04] | 27.12.1991 | Despatch of a communication from the examining division (Time limit: M06) | 27.06.1992 | Reply to a communication from the examining division | 29.01.1993 | Despatch of a communication from the examining division (Time limit: M04) | 01.06.1993 | Reply to a communication from the examining division | 13.06.1994 | Despatch of communication of intention to grant (Approval: Yes) | 22.09.1994 | Communication of intention to grant the patent | 27.09.1994 | Fee for grant paid | 27.09.1994 | Fee for publishing/printing paid | Opposition(s) | 23.12.1995 | No opposition filed within time limit [1996/11] | Fees paid | Renewal fee | 14.12.1989 | Renewal fee patent year 03 | 10.12.1990 | Renewal fee patent year 04 | 11.12.1991 | Renewal fee patent year 05 | 10.12.1992 | Renewal fee patent year 06 | 21.12.1993 | Renewal fee patent year 07 | 19.12.1994 | Renewal fee patent year 08 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Lapses during opposition Tooltip | IT | 22.03.1995 | [1999/42] | Documents cited: | Search | [Y] JP58038035 | [Y] PATENT ABSTRACTS OF JAPAN, Vol. 7, No. 119 (E-177)(1264), May 24, 1983, page 68; & JP-A-58 038 035 (TOKYO SHIBAURA DENKI K.K.) 05-03-1983 [Y] | [A] IBM Technical Disclosure Bulletin, Vol. 26, No. 8, January 1984, page 4199; New York, US, J.H. HONG et al.: "Phase-locked loop with fast acquisition time". [A] |