EP0248668 - Process for fabricating multilevel metal integrated circuits and structures produced thereby [Right-click to bookmark this link] | Status | The application is deemed to be withdrawn Status updated on 02.03.1993 Database last updated on 15.06.2024 | Most recent event Tooltip | 15.08.2008 | Change - applicant | published on 17.09.2008 [2008/38] | Applicant(s) | For all designated states Hewlett-Packard Company 3000 Hanover Street Palo Alto, CA 94304-1112 / US | [N/P] |
Former [2008/38] | For all designated states Hewlett-Packard Company 3000 Hanover Street Palo Alto CA 94304-1112 / US | ||
Former [1987/50] | For all designated states Hewlett-Packard Company Mail Stop 20 B-O, 3000 Hanover Street Palo Alto, California 94304 / US | Inventor(s) | 01 /
Koch, Tim Roger 2470 Rolling Green Drive Apt. No. 32 Corvallis, OR 97330 / US | [1987/50] | Representative(s) | Colgan, Stephen James, et al CARPMAELS & RANSFORD 43 Bloomsbury Square London WC1A 2RA / GB | [N/P] |
Former [1987/50] | Colgan, Stephen James, et al CARPMAELS & RANSFORD 43 Bloomsbury Square London WC1A 2RA / GB | Application number, filing date | 87304955.5 | 04.06.1987 | [1987/50] | Priority number, date | US19860871660 | 06.06.1986 Original published format: US 871660 | [1987/50] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0248668 | Date: | 09.12.1987 | Language: | EN | [1987/50] | Type: | A3 Search report | No.: | EP0248668 | Date: | 06.07.1988 | Language: | EN | [1988/27] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 19.05.1988 | Classification | IPC: | H01L21/90, H01L23/52 | [1987/50] | CPC: |
H01L21/76885 (EP,US);
H01L21/7684 (EP,US);
H01L23/53223 (EP,US);
H01L2924/0002 (EP,US);
Y10S438/937 (EP,US)
| C-Set: |
H01L2924/0002, H01L2924/00 (EP,US)
| Designated contracting states | DE, FR, GB, IT [1987/50] | Title | German: | Verfahren zum Herstellen von integrierten metallischen Mehrschicht-Schaltungen und gemäss diesem Verfahren hergestellte Strukturen | [1987/50] | English: | Process for fabricating multilevel metal integrated circuits and structures produced thereby | [1987/50] | French: | Procédé pour la fabrication de circuits métalliques intégrés à multicouche et structures ainsi fabriquées | [1987/50] | File destroyed: | 12.06.1999 | Examination procedure | 29.12.1988 | Examination requested [1989/09] | 05.04.1991 | Despatch of a communication from the examining division (Time limit: M06) | 10.10.1991 | Reply to a communication from the examining division | 11.06.1992 | Despatch of a communication from the examining division (Time limit: M04) | 22.10.1992 | Application deemed to be withdrawn, date of legal effect [1993/16] | 25.11.1992 | Despatch of communication that the application is deemed to be withdrawn, reason: reply to the communication from the examining division not received in time [1993/16] | Fees paid | Renewal fee | 28.06.1989 | Renewal fee patent year 03 | 28.05.1990 | Renewal fee patent year 04 | 27.05.1991 | Renewal fee patent year 05 | 18.05.1992 | Renewal fee patent year 06 |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | EP0147247 [ ] (MONOLITHIC MEMORIES INC [US]); | EP0014727 [ ] (HEPTING & CO CARL); | EP0002185 [ ] (IBM [US]); | EP0129389 [ ] (PLESSEY OVERSEAS [GB]) |