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EP0260033
European procedure
Extract from the Register of European Patents
EP About this file: EP0260033
| EP0260033 - Semiconductor integrated circuits [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 07.01.1993 Database last updated on 05.10.2024 | Most recent event Tooltip | 28.11.2003 | Lapse of the patent in a contracting state New state(s): ES | published on 14.01.2004 [2004/03] | Applicant(s) | For all designated states Pilkington Micro-Electronics Limited Prescot Road St. Helens Merseyside WA10 3TT / GB | [N/P] |
| Former [1988/11] | For all designated states Pilkington Micro-Electronics Limited Prescot Road St. Helens Merseyside WA10 3TT / GB | Inventor(s) | 01 /
Austin, Kenneth Willows End 226B Chester Road Hartford Northwich Cheshire / GB | [1988/11] | Representative(s) | Cardwell, Stuart Martin, et al Roystons Tower Building Water Street Liverpool, L3 1BA / GB | [N/P] |
| Former [1991/42] | Cardwell, Stuart Martin, et al Roystons Tower Building Water Street Liverpool, Merseyside L3 1BA / GB | ||
| Former [1988/11] | Dodd, David Michael ROYSTONS 531 Tower Building Water Street Liverpool L3 1BA / GB | Application number, filing date | 87307599.8 | 27.08.1987 | [1988/11] | Priority number, date | GB19860021357 | 04.09.1986 Original published format: GB 8621357 | [1988/11] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0260033 | Date: | 16.03.1988 | Language: | EN | [1988/11] | Type: | A3 Search report | No.: | EP0260033 | Date: | 03.05.1989 | Language: | EN | [1989/18] | Type: | B1 Patent specification | No.: | EP0260033 | Date: | 04.03.1992 | Language: | EN | [1992/10] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 16.03.1989 | Classification | IPC: | H03K17/60, H03K19/173 | [1988/11] | CPC: |
H03K17/602 (EP,US);
H03K19/082 (KR);
H03K19/1736 (EP,US)
| Designated contracting states | AT, BE, CH, DE, ES, FR, GB, GR, IT, LI, LU, NL, SE [1992/18] |
| Former [1992/17] | AT, BE, CH, DE, ES, FR, GR, IT, LI, LU, NL, SE | ||
| Former [1988/11] | AT, BE, CH, DE, ES, FR, GB, GR, IT, LI, LU, NL, SE | Title | German: | Halbleiter-integrierte Schaltungen | [1988/11] | English: | Semiconductor integrated circuits | [1988/11] | French: | Circuits intégrés à semi-conducteurs | [1988/11] | Examination procedure | 05.10.1989 | Examination requested [1989/48] | 19.10.1990 | Despatch of a communication from the examining division (Time limit: M04) | 18.02.1991 | Reply to a communication from the examining division | 12.07.1991 | Despatch of communication of intention to grant (Approval: Yes) | 30.08.1991 | Communication of intention to grant the patent | 21.11.1991 | Fee for grant paid | 21.11.1991 | Fee for publishing/printing paid | Opposition(s) | 05.12.1992 | No opposition filed within time limit [1993/08] | Fees paid | Renewal fee | 14.08.1989 | Renewal fee patent year 03 | 18.08.1990 | Renewal fee patent year 04 | 08.08.1991 | Renewal fee patent year 05 |
| Opt-out from the exclusive Tooltip competence of the Unified Patent Court | See the Register of the Unified Patent Court for opt-out data | ||
| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Lapses during opposition Tooltip | GR | 04.03.1992 | ES | 15.06.1992 | GB | 27.08.1992 | [2004/03] |
| Former [2000/04] | GR | 04.03.1992 | |
| GB | 27.08.1992 | ||
| Former [1993/47] | GB | 27.08.1992 | Documents cited: | Search | [Y]US3551699 (KARWACKI FRED); | [A]US3568005 (ATKINS CARL E); | [A]GB1236339 (IBM [US]); | [X]US4336601 (TANAKA MAMORU) | [A] - IEEE TRANSACTIONS ON COMPUTERS, vol. C-30, no. 3, March 1981, pages 229-234, IEEE, New York, US; M. TANAKA et al.: "Rewritable programmable logic array of current mode logic" |