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EP0337986
European procedure
Extract from the Register of European Patents
EP About this file: EP0337986
| EP0337986 - MULTILAYER CIRCUIT BOARD FABRICATION PROCESS [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 10.02.1994 Database last updated on 27.07.2024 | Most recent event Tooltip | 23.11.2007 | Lapse of the patent in a contracting state | published on 26.12.2007 [2007/52] | Applicant(s) | For all designated states THE FOXBORO COMPANY 38 Neponset Avenue Foxboro, MA 02035 / US | [1989/43] | Inventor(s) | 01 /
LAKE, Harold 5 Carlton Road Sharon, MA 02067 / US | 02 /
GRANDMONT, Paul, E. 38 Emmons Street Franklin, MA 02038 / US | [1989/43] | Representative(s) | Blatchford, William Michael, et al Withers & Rogers LLP 4 More London Riverside London SE1 2AU / GB | [N/P] |
| Former [1993/14] | Blatchford, William Michael, et al Withers & Rogers 4 Dyer's Buildings Holborn London EC1N 2JT / GB | ||
| Former [1989/43] | Blatchford, William Michael Withers & Rogers 4 Dyer's Buildings Holborn London EC1N 2JT / GB | Application number, filing date | 87903756.2 | 17.12.1986 | [1989/43] | WO1986US02710 | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | WO8804877 | Date: | 30.06.1988 | Language: | EN | [1988/14] | Type: | A1 Application with search report | No.: | EP0337986 | Date: | 25.10.1989 | Language: | EN | The application published by WIPO in one of the EPO official languages on 30.06.1988 takes the place of the publication of the European patent application. | [1989/43] | Type: | B1 Patent specification | No.: | EP0337986 | Date: | 07.04.1993 | Language: | EN | [1993/14] | Search report(s) | International search report - published on: | EP | 30.06.1988 | Classification | IPC: | H05K3/40, H05K3/46 | [1989/43] | CPC: |
H05K3/0023 (EP);
H05K3/465 (EP);
H05K2201/0394 (EP);
H05K2201/09563 (EP);
H05K2203/0554 (EP);
H05K3/0035 (EP);
H05K3/0041 (EP);
H05K3/107 (EP);
H05K3/108 (EP);
H05K3/184 (EP);
H05K3/244 (EP);
H05K3/422 (EP);
| Designated contracting states | AT, BE, CH, DE, FR, GB, IT, LI, LU, NL, SE [1989/43] | Title | German: | VERFAHREN ZUR HERSTELLUNG VON MEHRSCHICHTLEITERPLATTEN | [1989/43] | English: | MULTILAYER CIRCUIT BOARD FABRICATION PROCESS | [1989/43] | French: | PROCEDE DE FABRICATION DE CARTES DE CIRCUITS MULTICOUCHES | [1989/43] | Entry into regional phase | 03.07.1989 | National basic fee paid | 03.07.1989 | Designation fee(s) paid | 19.06.1989 | Examination fee paid | Examination procedure | 14.07.1988 | Request for preliminary examination filed International Preliminary Examining Authority: DE | 19.06.1989 | Examination requested [1989/43] | 11.03.1991 | Despatch of a communication from the examining division (Time limit: M04) | 26.06.1991 | Reply to a communication from the examining division | 06.12.1991 | Despatch of a communication from the examining division (Time limit: M04) | 30.03.1992 | Reply to a communication from the examining division | 25.06.1992 | Despatch of communication of intention to grant (Approval: No) | 15.09.1992 | Despatch of communication of intention to grant (Approval: later approval) | 22.09.1992 | Communication of intention to grant the patent | 21.12.1992 | Fee for grant paid | 21.12.1992 | Fee for publishing/printing paid | Opposition(s) | 08.01.1994 | No opposition filed within time limit [1994/13] | Fees paid | Renewal fee | 03.07.1989 | Renewal fee patent year 03 | 18.10.1989 | Renewal fee patent year 04 | 29.11.1990 | Renewal fee patent year 05 | 25.11.1991 | Renewal fee patent year 06 | 13.11.1992 | Renewal fee patent year 07 | Penalty fee | Additional fee for renewal fee | 17.06.1989 | 03 M06 Fee paid on 03.07.1989 |
| Opt-out from the exclusive Tooltip competence of the Unified Patent Court | See the Register of the Unified Patent Court for opt-out data | ||
| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Lapses during opposition Tooltip | AT | 07.04.1993 | BE | 07.04.1993 | IT | 07.04.1993 | NL | 07.04.1993 | SE | 07.04.1993 | LU | 31.12.1993 | [2007/52] |
| Former [2000/06] | AT | 07.04.1993 | |
| BE | 07.04.1993 | ||
| IT | 07.04.1993 | ||
| NL | 07.04.1993 | ||
| SE | 07.04.1993 | ||
| LU | 31.12.1993 | ||
| Former [1999/42] | AT | 07.04.1993 | |
| BE | 07.04.1993 | ||
| IT | 07.04.1993 | ||
| NL | 07.04.1993 | ||
| SE | 07.04.1993 | ||
| Former [1994/25] | AT | 07.04.1993 | |
| BE | 07.04.1993 | ||
| NL | 07.04.1993 | ||
| SE | 07.04.1993 | ||
| Former [1993/52] | BE | 07.04.1993 | |
| NL | 07.04.1993 | ||
| SE | 07.04.1993 | ||
| Former [1993/51] | BE | 07.04.1993 | |
| NL | 07.04.1993 | Cited in | International search | US3352730 [ ] (MURCH JR CHARLES J); | US3471631 [ ] (QUINTANA LEO J); | DE1937508 [ ] (SIEMENS AG); | FR2387568 [ ] (SIEMENS AG [DE]); | GB2111313 [ ] (WESTERN ELECTRIC CO) | [X] - IBM Technical Disclosure Bulletin, Volume 23, No. 10, March 1981, (New York, US), W.D. GROBMAN: "Multilayer Packaging using resist Layers", pages 4751-4752 see pages 4751-4752 | [X] - IBM Technical Disclosure Bulletin, Volume 8, No. 11, April 1986, (New York, US), M.M HADDAD: "Additive Multilayer Circuit", page 1482 see page 1482 | Examination | - IBM Technical Disclosure Bulletin, vol. 8, no. 11, April 1966, (New York, US), M.M. Haddad: "Additive multilayer circuit", page 1482. |