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EP0284357
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EP About this file: EP0284357
| EP0284357 - Semiconductor integrated circuit having a data output buffer circuit [Right-click to bookmark this link] | Status | The application has been refused Status updated on 17.03.1993 Database last updated on 02.07.2024 | Most recent event Tooltip | 17.03.1993 | Refusal of application | published on 05.05.1993 [1993/18] | Applicant(s) | For all designated states Kabushiki Kaisha Toshiba 72, Horikawa-cho, Saiwai-ku Kawasaki-shi Kanagawa-ken 210-8572 / JP | [N/P] |
| Former [1988/39] | For all designated states KABUSHIKI KAISHA TOSHIBA 72, Horikawa-cho, Saiwai-ku Kawasaki-shi, Kanagawa-ken 210, Tokyo / JP | Inventor(s) | 01 /
Ohshima, Shigeo c/o Patent Division Toshiba Corp. Principal Off., 1-1 shibaura 1-chome Minato-ku Tokyo / JP | 02 /
Sahara, Hiroshi c/o Patent Division Toshiba Corp. Principal Off., 1-1 Shibaura,1-chome Minato-ku Tokyo / JP | [1988/39] | Representative(s) | Freed, Arthur Woolf, et al Marks & Clerk Incorporating Edward Evans Barker 90 Long Acre London WC2E 9RA / GB | [N/P] |
| Former [1988/39] | Freed, Arthur Woolf, et al MARKS & CLERK, 57-60 Lincoln's Inn Fields London WC2A 3LS / GB | Application number, filing date | 88302518.1 | 22.03.1988 | [1988/39] | Priority number, date | JP19870068254 | 23.03.1987 Original published format: JP 6825487 | [1988/39] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0284357 | Date: | 28.09.1988 | Language: | EN | [1988/39] | Type: | A3 Search report | No.: | EP0284357 | Date: | 13.12.1989 | Language: | EN | [1989/50] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 25.10.1989 | Classification | IPC: | H03K5/02, H03K19/094, H03K19/003, H03K17/16 | [1988/39] | CPC: |
G11C11/34 (KR);
H03K17/162 (EP,US);
H03K19/00361 (EP,US)
| Designated contracting states | DE, FR, GB [1988/39] | Title | German: | Integrierte Halbleiterschaltung mit einer Pufferschaltung für Datenausgabe | [1988/39] | English: | Semiconductor integrated circuit having a data output buffer circuit | [1988/39] | French: | Circuit intégré à semi-conducteurs ayant un circuit tampon pour sortie de signaux | [1988/39] | File destroyed: | 12.06.1999 | Examination procedure | 30.03.1988 | Examination requested [1988/39] | 28.01.1991 | Despatch of a communication from the examining division (Time limit: M06) | 29.07.1991 | Reply to a communication from the examining division | 11.10.1991 | Despatch of a communication from the examining division (Time limit: M04) | 05.02.1992 | Reply to a communication from the examining division | 30.10.1992 | Date of oral proceedings | 04.12.1992 | Despatch of communication that the application is refused, reason: substantive examination [1993/18] | 04.12.1992 | Minutes of oral proceedings despatched | 14.12.1992 | Application refused, date of legal effect [1993/18] | Fees paid | Renewal fee | 15.03.1990 | Renewal fee patent year 03 | 17.12.1990 | Renewal fee patent year 04 | 13.03.1992 | Renewal fee patent year 05 |
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