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Extract from the Register of European Patents

EP About this file: EP0295186

EP0295186 - Boundary-free semiconductor memory device having a plurality of slide access memories [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  24.06.1995
Database last updated on 05.08.2024
Most recent event   Tooltip24.06.1995No opposition filed within time limitpublished on 16.08.1995 [1995/33]
Applicant(s)For all designated states
FUJITSU LIMITED
1015, Kamikodanaka, Nakahara-ku Kawasaki-shi
Kanagawa 211 / JP
[N/P]
Former [1988/50]For all designated states
FUJITSU LIMITED
1015, Kamikodanaka, Nakahara-ku
Kawasaki-shi, Kanagawa 211 / JP
Inventor(s)01 / Masuda, Yusuke
1070, Shimokodanaka Nakahara-ku
Kawasaki-shi Kanagawa 211 / JP
02 / Ogawa, Junji
14-1-405, Sugekitaura 4-chome Tama-ku
Kawasaki-shi Kanagawa 214 / JP
[1988/50]
Representative(s)Joly, Jean-Jacques, et al
Cabinet Beau de Loménie
158, rue de l'Université
75340 Paris cedex 07 / FR
[N/P]
Former [1988/50]Joly, Jean-Jacques, et al
Cabinet Beau de Loménie 158, rue de l'Université
F-75340 Paris Cédex 07 / FR
Application number, filing date88401439.010.06.1988
[1988/50]
Priority number, dateJP1987014325410.06.1987         Original published format: JP 14325487
[1988/50]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0295186
Date:14.12.1988
Language:EN
[1988/50]
Type: A3 Search report 
No.:EP0295186
Date:20.02.1991
Language:EN
[1991/08]
Type: B1 Patent specification 
No.:EP0295186
Date:24.08.1994
Language:EN
[1994/34]
Search report(s)(Supplementary) European search report - dispatched on:EP03.01.1991
ClassificationIPC:G11C8/00, G11C11/24
[1988/50]
CPC:
G11C8/12 (EP,US); G11C7/00 (KR); G06T1/60 (EP,US)
Designated contracting statesDE,   FR,   GB [1988/50]
TitleGerman:Halbleiterspeicheranordnung ohne Begrenzung mit einer Vielheit von Schubladespeichern[1988/50]
English:Boundary-free semiconductor memory device having a plurality of slide access memories[1988/50]
French:Dispositif de mémoire à semi-conducteurs sans limites comprenant une pluralité de mémoires à tiroir[1988/50]
Examination procedure12.07.1991Examination requested  [1991/37]
17.07.1992Despatch of a communication from the examining division (Time limit: M06)
26.01.1993Reply to a communication from the examining division
29.06.1993Despatch of communication of intention to grant (Approval: No)
13.01.1994Despatch of communication of intention to grant (Approval: later approval)
24.01.1994Communication of intention to grant the patent
18.04.1994Fee for grant paid
18.04.1994Fee for publishing/printing paid
Opposition(s)25.05.1995No opposition filed within time limit [1995/33]
Fees paidRenewal fee
22.06.1990Renewal fee patent year 03
20.06.1991Renewal fee patent year 04
19.06.1992Renewal fee patent year 05
18.06.1993Renewal fee patent year 06
20.06.1994Renewal fee patent year 07
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Lapses during opposition  TooltipDE25.11.1994
[1995/15]
Documents cited:Search[A]JP58001872  ;
 [Y]GB2092785  (RCA CORP);
 [Y]US4561072  (ARAKAWA TAKESHI [JP], et al)
 [A]  - PATENT ABSTRACTS OF JAPAN, vol. 7. no. 70 (P-185), 23rd March 1983; & JP-A-58 001 872 (FUJITSU K.K.) 07-01-1983, & JP58001872 A 00000000
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.