blank Quick help
blank Maintenance news

Scheduled maintenance

Regular maintenance outages:
between 05.00 and 05.15 hrs CET (Monday to Sunday).

Other outages
Availability
Register Forum

2022.02.11

More...
blank News flashes

News Flashes

New version of the European Patent Register – SPC proceedings information in the Unitary Patent Register.

2024-07-24

More...
blank Related links

Extract from the Register of European Patents

EP About this file: EP0299887

EP0299887 - Test appliance and process for an integrated circuit so as to measure surface layer effects [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  04.12.1993
Database last updated on 31.08.2024
Most recent event   Tooltip04.12.1993No opposition filed within time limitpublished on 26.01.1994 [1994/04]
Applicant(s)For all designated states
STMicroelectronics S.A.
7, Avenue Galliéni
94250 Gentilly / FR
[N/P]
Former [1989/03]For all designated states
SGS-THOMSON MICROELECTRONICS S.A.
7, Avenue Galliéni
F-94250 Gentilly / FR
Inventor(s)01 / Juge, André
15, Rue de la Contamine
F-38120 Saint Egreve / FR
[1989/03]
Representative(s)de Beaumont, Michel, et al
1bis, rue Champollion
38000 Grenoble / FR
[N/P]
Former [1989/03]de Beaumont, Michel, et al
1bis, rue Champollion
F-38000 Grenoble / FR
Application number, filing date88420237.506.07.1988
[1989/03]
Priority number, dateFR1987000990307.07.1987         Original published format: FR 8709903
[1989/03]
Filing languageFR
Procedural languageFR
PublicationType: A1 Application with search report 
No.:EP0299887
Date:18.01.1989
Language:FR
[1989/03]
Type: B1 Patent specification 
No.:EP0299887
Date:03.02.1993
Language:FR
[1993/05]
Search report(s)(Supplementary) European search report - dispatched on:EP24.11.1988
ClassificationIPC:G01R27/02, H01L29/06
[1989/03]
CPC:
H01L29/0603 (EP,US); H01L22/00 (KR); G01R27/02 (EP,US)
Designated contracting statesDE,   FR,   GB,   IT,   NL [1989/03]
TitleGerman:Testanordnung und -verfahren für integrierte Schaltungen, womit das Bestimmen von Oberflächenschichteffekten möglich wird[1989/03]
English:Test appliance and process for an integrated circuit so as to measure surface layer effects[1989/03]
French:Structure et procédé de test pour circuit intégré permettant la détermination des effets de surface de couches[1989/03]
Examination procedure07.07.1989Examination requested  [1989/38]
06.12.1991Despatch of a communication from the examining division (Time limit: M04)
11.01.1992Reply to a communication from the examining division
16.03.1992Despatch of communication of intention to grant (Approval: Yes)
03.07.1992Communication of intention to grant the patent
03.09.1992Fee for grant paid
03.09.1992Fee for publishing/printing paid
Opposition(s)04.11.1993No opposition filed within time limit [1994/04]
Fees paidRenewal fee
19.07.1990Renewal fee patent year 03
13.07.1991Renewal fee patent year 04
09.07.1992Renewal fee patent year 05
Opt-out from the exclusive  Tooltip
competence of the Unified
Patent Court
See the Register of the Unified Patent Court for opt-out data
Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Lapses during opposition  TooltipNL03.02.1993
[1993/38]
Documents cited:Search[A]FR2296852  (IBM [US]);
 [A]EP0201945  (PHILIPS ELECTRONICS UK LTD [GB], et al);
 [A]EP0175870  (MOSAIC SYSTEMS INC [US])
 [A]  - IBM TECHNICAL DISCLOSURE BULLETIN, vol. 14, no. 12, 12 mai 1972, page 3707, New York, US; T.H. BAKER et al.: "Dumbbell-type resistance testing structure"
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.