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EP0334943
European procedure
Extract from the Register of European Patents
EP About this file: EP0334943
| EP0334943 - ENHANCED INPUT/OUPUT ARCHITECTURE FOR TOROIDALLY-CONNECTED DISTRIBUTED-MEMORY PARALLEL COMPUTERS [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 19.11.1992 Database last updated on 03.10.2024 | Most recent event Tooltip | 15.08.2008 | Change - applicant | published on 17.09.2008 [2008/38] | Applicant(s) | For all designated states Eastman Kodak Company 343 State Street Rochester, NY 14650-2201 / US | [N/P] |
| Former [2008/38] | For all designated states Eastman Kodak Company 343 State Street Rochester NY 14650-2201 / US | ||
| Former [1989/40] | For all designated states EASTMAN KODAK COMPANY (a New Jersey corporation) 343 State Street Rochester, New York 14650 / US | Inventor(s) | 01 /
COK, Ronald, Steven 100 LeGran Road Rochester, NY 14617 / US | [1989/40] | Representative(s) | Buff, Michel, et al KODAK INDUSTRIE Département Brevets - CRT Zone Industrielle - B.P. 21 71102 Chalon sur Saône Cédex / FR | [N/P] |
| Former [1989/40] | Buff, Michel, et al Kodak-Pathé Département des Brevets et Licences CRT Centre de Recherches et de Technologie Zone Industrielle F-71102 Chalon sur Saône Cédex / FR | Application number, filing date | 88909424.9 | 29.09.1988 | [1989/40] | WO1988US03340 | Priority number, date | US19870105836 | 08.10.1987 Original published format: US 105836 | [1989/40] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | WO8903564 | Date: | 20.04.1989 | Language: | EN | [1989/09] | Type: | A1 Application with search report | No.: | EP0334943 | Date: | 04.10.1989 | Language: | EN | The application published by WIPO in one of the EPO official languages on 20.04.1989 takes the place of the publication of the European patent application. | [1989/40] | Type: | B1 Patent specification | No.: | EP0334943 | Date: | 15.01.1992 | Language: | EN | [1992/03] | Search report(s) | International search report - published on: | EP | 20.04.1989 | Classification | IPC: | G06F15/16, G06F15/76 | [1992/03] | CPC: |
G06F15/17343 (EP,US);
G06F15/80 (EP,US);
G06F15/8023 (EP,US)
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| Former IPC [1989/40] | G06F15/06, G06F15/16 | Designated contracting states | DE, FR, GB [1989/40] | Title | German: | EINGANGS-/AUSGANGSARCHITEKTUR FÜR RINGVERBUNDENE VERTEILTE-SPEICHER-PARALLELRECHNER | [1989/40] | English: | ENHANCED INPUT/OUPUT ARCHITECTURE FOR TOROIDALLY-CONNECTED DISTRIBUTED-MEMORY PARALLEL COMPUTERS | [1989/40] | French: | ARCHITECTURE D'ENTREE/SORTIE AMELIOREE POUR ORDINATEURS EN PARALLELE CONNECTES TOROIDALEMENT ET A MEMOIRES REPARTIES | [1989/40] | Entry into regional phase | 21.06.1989 | National basic fee paid | 21.06.1989 | Designation fee(s) paid | 21.06.1989 | Examination fee paid | Examination procedure | 21.06.1989 | Examination requested [1989/40] | 25.01.1991 | Despatch of communication of intention to grant (Approval: Yes) | 08.07.1991 | Communication of intention to grant the patent | 30.09.1991 | Fee for grant paid | 30.09.1991 | Fee for publishing/printing paid | Opposition(s) | 16.10.1992 | No opposition filed within time limit [1993/01] | Fees paid | Renewal fee | 10.09.1990 | Renewal fee patent year 03 | 19.09.1991 | Renewal fee patent year 04 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Cited in | International search | WO8702156 [ ] (SAXPY COMPUTER CORP [US]) | [X] - 1985 IEEE International Conference on Robotics and Automation, St. Louis, Missouri, 25-28 March 1985, IEEE, (US), J. Greg Nash: "A systolic/cellular computer architecture for linear algebraic operations", pages 779-784 | [A] - 1985 IEEE Computer Society Workshop on Computer Architecture for Pattern Analysis and Image Database Management, Miami Beach, Florida, 18-20 November 1985, IEEE, (US), H.C. Fu et al.: "A new pipeline/parallel architecture for prime factor discrete Fourier transform", pages 305-310 | [A] - The 11th Annual International Symposium on Computer Architecture, Ann Arbor, Michigan, 5-7 June 1984, IEEE, (US), A. Kapauan et al.: "The pringle parallel computer", pages 12-20 | Examination | - IEEE Computer Workshop on Computer Architecture for Pattern Analysis and Image Database Management, Miami Beach, Florida, 18-20 November 1985, IEEE, (US), H.C. Fu et al.: "A new pipeline/parallel architecture for prime factor discrete Fourier transform", pages 305-310 |