EP0348895 - Semiconductor memory device provided with low-noise power supply structure [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 22.03.1996 Database last updated on 31.08.2024 | Most recent event Tooltip | 22.03.1996 | No opposition filed within time limit | published on 08.05.1996 [1996/19] | Applicant(s) | For all designated states NEC Corporation 7-1, Shiba 5-chome Minato-ku Tokyo 108-8001 / JP | [N/P] |
Former [1990/01] | For all designated states NEC CORPORATION 7-1, Shiba 5-chome Minato-ku Tokyo / JP | Inventor(s) | 01 /
Kobatake, Hiroyuki c/o NEC Corporation 33-1, Shiba 5-chome Minato-ku Tokyo / JP | [1990/01] | Representative(s) | Glawe, Delfs, Moll Partnerschaft mbB von Patent- und Rechtsanwälten Postfach 26 01 62 80058 München / DE | [N/P] |
Former [1990/01] | Glawe, Delfs, Moll & Partner Patentanwälte Postfach 26 01 62 D-80058 München / DE | Application number, filing date | 89111678.2 | 27.06.1989 | [1990/01] | Priority number, date | JP19880158733 | 27.06.1988 Original published format: JP 15873388 | JP19880158741 | 27.06.1988 Original published format: JP 15874188 | [1990/01] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0348895 | Date: | 03.01.1990 | Language: | EN | [1990/01] | Type: | A3 Search report | No.: | EP0348895 | Date: | 22.08.1990 | Language: | EN | [1990/34] | Type: | B1 Patent specification | No.: | EP0348895 | Date: | 17.05.1995 | Language: | EN | [1995/20] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 03.07.1990 | Classification | IPC: | G11C5/00, G11C17/00 | [1990/33] | CPC: |
G11C17/12 (EP);
G11C17/123 (EP);
G11C5/147 (EP)
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Former IPC [1990/01] | G11C17/00, G11C5/00 | Designated contracting states | DE, FR, GB [1990/01] | Title | German: | Halbleiterspeichervorrichtung, die mit einer Niederrausch-Spannungsversorgung ausgestattet ist | [1990/01] | English: | Semiconductor memory device provided with low-noise power supply structure | [1990/01] | French: | Dispositif de mémoire semi-conductrice avec une source de tension à structure à faible bruit | [1990/01] | Examination procedure | 27.06.1989 | Examination requested [1990/01] | 18.02.1993 | Despatch of a communication from the examining division (Time limit: M06) | 20.08.1993 | Reply to a communication from the examining division | 19.10.1993 | Despatch of a communication from the examining division (Time limit: M06) | 22.04.1994 | Reply to a communication from the examining division | 29.06.1994 | Despatch of communication of intention to grant (Approval: Yes) | 10.11.1994 | Communication of intention to grant the patent | 19.01.1995 | Fee for grant paid | 19.01.1995 | Fee for publishing/printing paid | Opposition(s) | 20.02.1996 | No opposition filed within time limit [1996/19] | Fees paid | Renewal fee | 20.06.1991 | Renewal fee patent year 03 | 22.06.1992 | Renewal fee patent year 04 | 21.06.1993 | Renewal fee patent year 05 | 17.06.1994 | Renewal fee patent year 06 |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [Y]EP0255125 ; | [A]EP0151870 ; | [A]GB2087183 ; | [A]EP0081368 | [Y] - ELECTRICAL DESIGN NEWS, vol. 18, no. 16, 20th August 1973, pages 50-60, Denver, US; M. HOFF: "Designing with RAMs - Part II-Conclusion" |