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Extract from the Register of European Patents

EP About this file: EP0326218

EP0326218 - Method of manufacturing a semiconductor device, in which a metal conductor track is provided on a surface of a semiconductor body [Right-click to bookmark this link]
StatusThe application has been refused
Status updated on  15.09.1994
Database last updated on 11.05.2024
Most recent event   Tooltip05.10.2005Change: Appeal number 
Applicant(s)For all designated states
Koninklijke Philips Electronics N.V.
Groenewoudseweg 1
5621 BA Eindhoven / NL
[N/P]
Former [1989/31]For all designated states
Philips Electronics N.V.
Groenewoudseweg 1
NL-5621 BA Eindhoven / NL
Inventor(s)01 / Wolters, Robertus Adrianus Maria
c/o INT. OCTROOIBUREAU B.V. Prof. Holstlaan 6
NL-5656 AA Eindhoven / NL
02 / Jonkers, Alexander Gijsbertus Mathias
c/o INT. OCTROOIBUREAU B.V. Prof. Holstlaan 6
NL-5656 AA Eindhoven / NL
[1989/31]
Representative(s)Rensen, Jan Geert, et al
INTERNATIONAAL OCTROOIBUREAU B.V., Prof. Holstlaan 6
5656 AA Eindhoven / NL
[N/P]
Former [1989/31]Rensen, Jan Geert, et al
INTERNATIONAAL OCTROOIBUREAU B.V., Prof. Holstlaan 6
NL-5656 AA Eindhoven / NL
Application number, filing date89200134.824.01.1989
[1989/31]
Priority number, dateNL1988000022029.01.1988         Original published format: NL 8800220
[1989/31]
Filing languageNL
Procedural languageEN
PublicationType: A1 Application with search report 
No.:EP0326218
Date:02.08.1989
Language:EN
[1989/31]
Search report(s)(Supplementary) European search report - dispatched on:EP06.06.1989
ClassificationIPC:H01L21/90, H01L21/285, H01L21/31
[1989/31]
CPC:
H01L23/3157 (EP,US); H01L21/28 (KR); H01L21/28518 (EP,US);
H01L21/76895 (EP,US); H01L2924/0002 (EP,US); Y10S148/015 (EP,US);
Y10S438/902 (EP,US) (-)
C-Set:
H01L2924/0002, H01L2924/00 (EP,US)
Designated contracting statesDE,   FR,   GB,   IT,   NL [1989/31]
TitleGerman:Verfahren zum Herstellen einer Halbleiteranordnung, wobei auf einer Oberfläche eines Halbleiterkörpers eine Metalleiterbahn angebracht wird[1989/31]
English:Method of manufacturing a semiconductor device, in which a metal conductor track is provided on a surface of a semiconductor body[1989/31]
French:Procédé de fabrication d'un dispositif semi-conducteur suivant lequel une piste conductrice métallique est formée sur une surface d'un corps semi-conducteur[1989/31]
Examination procedure31.01.1990Examination requested  [1990/13]
08.07.1991Despatch of a communication from the examining division (Time limit: M04)
09.11.1991Reply to a communication from the examining division
06.04.1992Despatch of communication that the application is refused, reason: substantive examination [1994/44]
15.09.1994Application refused, date of legal effect [1994/44]
Appeal following examination11.06.1992Appeal received No.  T0798/92
07.08.1992Statement of grounds filed
28.07.1994Result of appeal procedure: appeal of the applicant was rejected
28.07.1994Date of oral proceedings
16.08.1994Minutes of oral proceedings despatched
Fees paidRenewal fee
29.01.1991Renewal fee patent year 03
28.01.1992Renewal fee patent year 04
27.01.1993Renewal fee patent year 05
26.01.1994Renewal fee patent year 06
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Documents cited:Search[Y]US4067099  (ITO SATORU, et al);
 [Y]US4106051  (DORMER LESLIE, et al);
 [A]DE3414781  (MITSUBISHI ELECTRIC CORP [JP])
 [A]  - IEEE ELECTRON DEVICE LETTERS, vol. EDL-7, no. 11, November 1986, pages 623-624, IEEE, New York, US; H.-H. TSENG et al.: "A new oxidation-resistant self-aligned TiSi2 process"
 [A]  - SOLID STATE TECHNOLOGY, vol. 29, no. 2, February 1986, pages 131-136, Port Washington, NY, US; R.A.M. WOLTERS et al.: "Properties of reactive sputtered TiW"
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.