| EP0375054 - Artificial neural integrated circuit with learning means [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 17.05.1996 Database last updated on 30.03.2026 | Most recent event Tooltip | 17.05.1996 | No opposition filed within time limit | published on 03.07.1996 [1996/27] | Applicant(s) | For:FR
LABORATOIRES D'ELECTRONIQUE PHILIPS 3, Avenue Descartes 94450 Limeil-Brévannes / FR | For:CH
DE
GB
IT
LI
SE
Koninklijke Philips Electronics N.V. Groenewoudseweg 1 5621 BA Eindhoven / NL | [N/P] |
| Former [1990/30] | For:FR
LABORATOIRES D'ELECTRONIQUE PHILIPS 3, Avenue Descartes F-94450 Limeil-Brévannes / FR | ||
| For:CH
DE
GB
IT
LI
SE
Philips Electronics N.V. Groenewoudseweg 1 NL-5621 BA Eindhoven / NL | |||
| Former [1990/26] | For:FR
LABORATOIRES D'ELECTRONIQUE PHILIPS 3, Avenue Descartes F-94450 Limeil-Brévannes / FR | ||
| For:CH
DE
GB
IT
LI
SE
Philips Electronics N.V. Groenewoudseweg 1 NL-5621 BA Eindhoven / NL | Inventor(s) | 01 /
Duranton, Marc Societe Civile S.P.I.D 209, rue de l'Université F-75007 Paris / FR | 02 /
Sirat, Jacques-Ariel Societe Civile S.P.I.D 209, rue de l'Université F-75007 Paris / FR | [1990/26] | Representative(s) | Landousy, Christian, et al Philips IP&S France Société Civile SPID 33 rue de Verdun BP 313 92156 Suresnes Cedex / FR | [N/P] |
| Former [1990/26] | Landousy, Christian, et al Société Civile S.P.I.D. 156, Boulevard Haussmann F-75008 Paris / FR | Application number, filing date | 89203224.4 | 18.12.1989 | [1990/26] | Priority number, date | FR19880017109 | 23.12.1988 Original published format: FR 8817109 | [1990/26] | Filing language | FR | Procedural language | FR | Publication | Type: | A1 Application with search report | No.: | EP0375054 | Date: | 27.06.1990 | Language: | FR | [1990/26] | Type: | B1 Patent specification | No.: | EP0375054 | Date: | 05.07.1995 | Language: | FR | [1995/27] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 07.05.1990 | Classification | IPC: | G06F15/80 | [1990/26] | CPC: |
G06N3/063 (EP,KR)
| Designated contracting states | CH, DE, FR, GB, IT, LI, SE [1990/26] | Title | German: | Künstliche neuronale integrierte Schaltung mit Lernmitteln | [1990/26] | English: | Artificial neural integrated circuit with learning means | [1990/26] | French: | Circuit intégré neuromimétique avec des moyens d'apprentissage | [1990/26] | Examination procedure | 18.12.1990 | Examination requested [1991/07] | 19.09.1994 | Despatch of communication of intention to grant (Approval: No) | 02.01.1995 | Despatch of communication of intention to grant (Approval: later approval) | 05.01.1995 | Communication of intention to grant the patent | 18.04.1995 | Fee for grant paid | 18.04.1995 | Fee for publishing/printing paid | Opposition(s) | 10.04.1996 | No opposition filed within time limit [1996/27] | Fees paid | Renewal fee | 24.12.1991 | Renewal fee patent year 03 | 28.12.1992 | Renewal fee patent year 04 | 23.12.1993 | Renewal fee patent year 05 | 02.01.1995 | Renewal fee patent year 06 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Lapses during opposition Tooltip | SE | 05.10.1995 | [1996/11] | Documents cited: | Search | [A] NEURAL NETWORKS, no. 1, supplment 1, 1988; J.J. PAULOS et al.: "A VLSI architecture for feedforward networks with integral back-propagation" [A] | [A] IEEE FIRST INTERNATIONAL CONFERENCE ON NEURAL NETWORKS, San Diego, CA, 21-24 juin 1987, pages III-403-III-409, IEEE, New York, US; A. AGRANAT et al.: "A new architecture for a microelectronic implementation of neural network models" [A] |