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Extract from the Register of European Patents

EP About this file: EP0352044

EP0352044 - Transistor base current compensation circuitry [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  19.10.1995
Database last updated on 02.09.2024
Most recent event   Tooltip19.10.1995No opposition filed within time limitpublished on 06.12.1995 [1995/49]
Applicant(s)For all designated states
GENERAL ELECTRIC COMPANY
1 River Road
Schenectady, NY 12345 / US
[N/P]
Former [1990/04]For all designated states
GENERAL ELECTRIC COMPANY
1 River Road
Schenectady, NY 12345 / US
Inventor(s)01 / Schade, Otto Heinrich, Jr.
12 Soder Road
North Caldwell New Jersey 07006 / US
[1990/04]
Representative(s)Meddle, Alan L., et al
FORRESTER & BOEHMERT, Pettenkoferstrasse 20-22
80336 München / DE
[N/P]
Former [1994/50]Meddle, Alan Leonard, et al
FORRESTER & BOEHMERT Franz-Joseph-Strasse 38
D-80801 München / DE
Former [1992/14]Pratt, Richard Wilson
London Patent Operation G.E. Technical Services Co. Inc. Essex House 12/13 Essex Street
London WC2R 3AA / GB
Former [1990/04]Smith, Thomas Ian Macdonald
London Patent Operation G.E. Technical Services Co. Inc. Burdett House 15-16 Buckingham Street
London WC2N 6DU / GB
Application number, filing date89307217.317.07.1989
[1990/04]
Priority number, dateUS1988022071218.07.1988         Original published format: US 220712
[1990/04]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report 
No.:EP0352044
Date:24.01.1990
Language:EN
[1990/04]
Type: B1 Patent specification 
No.:EP0352044
Date:14.12.1994
Language:EN
[1994/50]
Search report(s)(Supplementary) European search report - dispatched on:EP14.11.1989
ClassificationIPC:G05F3/30, G05F3/28
[1990/04]
CPC:
G05F3/30 (EP,US); G05F3/265 (EP,US)
Designated contracting statesDE,   FR,   GB,   IT,   NL [1990/04]
TitleGerman:Kompensierungsstromkreis für Transistorbasisstrom[1990/04]
English:Transistor base current compensation circuitry[1990/04]
French:Circuit de compensation pour le courant de base d'un transistor[1990/04]
Examination procedure02.07.1990Examination requested  [1990/36]
22.10.1992Despatch of a communication from the examining division (Time limit: M06)
22.04.1993Reply to a communication from the examining division
06.05.1993Despatch of a communication from the examining division (Time limit: M04)
06.09.1993Reply to a communication from the examining division
20.12.1993Despatch of communication of intention to grant (Approval: Yes)
17.06.1994Communication of intention to grant the patent
12.09.1994Fee for grant paid
12.09.1994Fee for publishing/printing paid
Opposition(s)15.09.1995No opposition filed within time limit [1995/49]
Fees paidRenewal fee
01.07.1991Renewal fee patent year 03
16.07.1992Renewal fee patent year 04
21.06.1993Renewal fee patent year 05
24.06.1994Renewal fee patent year 06
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Lapses during opposition  TooltipNL14.12.1994
[1995/35]
Documents cited:Search[A]JP6091425  ;
 [A]JP61226816  ;
 [A]US4325017  (SCHADE JR OTTO H);
 [A]US4284945  (AHMED ADEL A A);
 [A]EP0188401  (CENTRE ELECTRON HORLOGER [CH]);
 [A]US4282477  (AHMED ADEL A A);
 [A]US4590419  (MORIARTY JR JOHN K [US])
 [A]  - IEE EUROPAEN SOLID-STATE CIRCUITS CONFERENCE September 1975, LONDON, GB pages 40 - 42; G.C.M MEIJER: "AN INTEGRATED BANDGAP-REFERENCE"
 [A]  - PATENT ABSTRACTS OF JAPAN vol. 9, no. 239 (P-391)(1962) 25 September 1985, & JP-A-60 91425 (SHARP K.K) 22 May 1985,, & JP6091425 A 19850522
 [A]  - PATENT ABSTRACTS OF JAPAN vol. 11, no. 62 (P-551)(2509) 25 February 1987, & JP-A-61 226816 (TOSHIBA CORP) 8 October 1986,, & JP61226816 A 19861008
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.