-
EP0356218
European procedure
Extract from the Register of European Patents
EP About this file: EP0356218
| EP0356218 - Semiconductor memories and methods of manufacturing such memories [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 23.02.1996 Database last updated on 20.07.2024 | Most recent event Tooltip | 23.02.1996 | No opposition filed within time limit | published on 10.04.1996 [1996/15] | Applicant(s) | For all designated states Sony Corporation 7-35 Kitashinagawa 6-chome Shinagawa-ku Tokyo 141 / JP | [N/P] |
| Former [1990/09] | For all designated states SONY CORPORATION 7-35 Kitashinagawa 6-chome Shinagawa-ku Tokyo 141 / JP | Inventor(s) | 01 /
Matsushita, Takeshi Pat. Div. Sony Corporation 6-7-35 Kitashinagawa Shinagawa-ku Tokyo 141 / JP | 02 /
Shimanoe, Muneharu Pat. Div. Sony Corporation 6-7-35 Kitashinagawa Shinagawa-ku Tokyo 141 / JP | 03 /
Sato, Hiroshi Pat. Div. Sony Corporation 6-7-35 Kitashinagawa Shinagawa-ku Tokyo 141 / JP | 04 /
Nieda, Akira Pat. Div. Sony Corporation 6-7-35 Kitashinagawa Shinagawa-ku Tokyo 141 / JP | [1990/09] | Representative(s) | Cotter, Ivan John, et al D Young & Co LLP 120 Holborn London EC1N 2DY / GB | [N/P] |
| Former [1996/12] | Cotter, Ivan John, et al D. YOUNG & CO. 21 New Fetter Lane London EC4A 1DA / GB | ||
| Former [1990/09] | Thomas, Christopher Hugo, et al D. Young & Co, 21 New Fetter Lane London EC4A 1DA / GB | Application number, filing date | 89308540.7 | 23.08.1989 | [1990/09] | Priority number, date | JP19880212159 | 25.08.1988 Original published format: JP 21215988 | [1990/09] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0356218 | Date: | 28.02.1990 | Language: | EN | [1990/09] | Type: | A3 Search report | No.: | EP0356218 | Date: | 30.01.1991 | Language: | EN | [1991/05] | Type: | B1 Patent specification | No.: | EP0356218 | Date: | 19.04.1995 | Language: | EN | [1995/16] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 11.12.1990 | Classification | IPC: | H01L21/82, H01L27/108, H01L27/10 | [1990/52] | CPC: |
H10B12/33 (EP,US);
H01L21/70 (KR);
H10B12/038 (EP,US);
H10B12/373 (EP,US)
|
| Former IPC [1990/09] | H01L27/10, H01L21/82 | Designated contracting states | DE, FR, GB [1990/09] | Title | German: | Halbleiterspeicher und Verfahren zu deren Herstellung | [1990/09] | English: | Semiconductor memories and methods of manufacturing such memories | [1990/09] | French: | Mémoires à semiconducteur et procédé pour leur fabrication | [1990/09] | Examination procedure | 05.06.1991 | Examination requested [1991/31] | 11.10.1993 | Despatch of a communication from the examining division (Time limit: M06) | 21.04.1994 | Reply to a communication from the examining division | 01.07.1994 | Despatch of communication of intention to grant (Approval: Yes) | 18.10.1994 | Communication of intention to grant the patent | 30.11.1994 | Fee for grant paid | 30.11.1994 | Fee for publishing/printing paid | Opposition(s) | 20.01.1996 | No opposition filed within time limit [1996/15] | Fees paid | Renewal fee | 21.12.1990 | Renewal fee patent year 03 | 07.08.1992 | Renewal fee patent year 04 | 12.08.1993 | Renewal fee patent year 05 | 09.08.1994 | Renewal fee patent year 06 |
| Opt-out from the exclusive Tooltip competence of the Unified Patent Court | See the Register of the Unified Patent Court for opt-out data | ||
| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [AD]JP62259769 ; | [A]US4193836 (ALLISON DAVID F [US], et al); | [A]EP0220410 (IBM [US]) | [AD] - PATENT ABSTRACTS OF JAPAN vol. 12, no. 137 (M-690)(2984), 26 April 1988; & JP-A-62259769 (NEC) 12.11.1987, & JP62259769 A 19880426 |