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EP0410116
European procedure
Extract from the Register of European Patents
EP About this file: EP0410116
| EP0410116 - Method of manufacturing a wire-bonded semiconductor device [Right-click to bookmark this link] | |||
| Former [1991/05] | Semiconductor device including lead frames | ||
| [1995/36] | Status | No opposition filed within time limit Status updated on 12.07.1996 Database last updated on 07.10.2024 | Most recent event Tooltip | 12.07.1996 | No opposition filed within time limit | published on 28.08.1996 [1996/35] | Applicant(s) | For all designated states Kabushiki Kaisha Toshiba 72, Horikawa-cho, Saiwai-ku Kawasaki-shi Kanagawa-ken 210-8572 / JP | [N/P] |
| Former [1995/01] | For all designated states KABUSHIKI KAISHA TOSHIBA 72, Horikawa-cho, Saiwai-ku Kawasaki-shi, Kanagawa-ken 210, Tokyo / JP | ||
| Former [1991/05] | For all designated states Kabushiki Kaisha Toshiba 72, Horikawa-cho Saiwai-ku Kawasaki-shi / JP | Inventor(s) | 01 /
Ikenoue, Kazuhisa, C/o Intellectual Property Div. K.K. Toshiba, 1-1 Shibaura 1-chome Minato-ku, Tokyo 105 / JP | [1991/05] | Representative(s) | Lehn, Werner, et al Hoffmann Eitle, Patent- und Rechtsanwälte, Postfach 81 04 20 81904 München / DE | [N/P] |
| Former [1991/05] | Lehn, Werner, Dipl.-Ing., et al Hoffmann, Eitle & Partner, Patentanwälte, Postfach 81 04 20 D-81904 München / DE | Application number, filing date | 90110621.1 | 05.06.1990 | [1991/05] | Priority number, date | JP19890163686 | 28.06.1989 Original published format: JP 16368689 | [1991/05] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0410116 | Date: | 30.01.1991 | Language: | EN | [1991/05] | Type: | A3 Search report | No.: | EP0410116 | Date: | 06.05.1992 | Language: | EN | [1992/19] | Type: | B1 Patent specification | No.: | EP0410116 | Date: | 06.09.1995 | Language: | EN | [1995/36] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 16.03.1992 | Classification | IPC: | H01L21/60, H01L23/495 | [1995/36] | CPC: |
H01L21/60 (KR);
H01L23/4951 (EP);
H01L23/49537 (EP);
H01L23/49586 (EP);
H01L23/52 (KR);
H01L2224/48091 (EP);
H01L2224/48247 (EP);
H01L24/48 (EP);
H01L2924/00014 (EP);
H01L2924/181 (EP)
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| C-Set: |
H01L2224/48091, H01L2924/00014 (EP);
H01L2924/00014, H01L2224/05599 (EP);
H01L2924/00014, H01L2224/45099 (EP);
H01L2924/181, H01L2924/00 (EP) |
| Former IPC [1991/05] | H01L23/495 | Designated contracting states | DE, FR, GB [1991/05] | Title | German: | Verfahren zur Herstellung einer Halbleiteranordnung durch "Wire-bonding" | [1995/36] | English: | Method of manufacturing a wire-bonded semiconductor device | [1995/36] | French: | Procédé de fabrication d'un dispositif semiconducteur à connexion par fil | [1995/36] |
| Former [1991/05] | Halbleiteranordnung mit Leiterrahmen | ||
| Former [1991/05] | Semiconductor device including lead frames | ||
| Former [1991/05] | Dispositif semi-conducteur comprenant des cadres conducteurs | Examination procedure | 05.06.1990 | Examination requested [1991/05] | 19.07.1994 | Despatch of a communication from the examining division (Time limit: M04) | 09.09.1994 | Reply to a communication from the examining division | 11.11.1994 | Despatch of communication of intention to grant (Approval: Yes) | 09.03.1995 | Communication of intention to grant the patent | 31.05.1995 | Fee for grant paid | 31.05.1995 | Fee for publishing/printing paid | Opposition(s) | 08.06.1996 | No opposition filed within time limit [1996/35] | Fees paid | Renewal fee | 09.06.1992 | Renewal fee patent year 03 | 14.06.1993 | Renewal fee patent year 04 | 11.06.1994 | Renewal fee patent year 05 | 01.05.1995 | Renewal fee patent year 06 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [XP]EP0354696 (TOSHIBA KK [JP], et al); | [X]EP0108502 (FUJITSU LTD [JP]) |