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EP0438705
European procedure
Extract from the Register of European Patents
EP About this file: EP0438705
| EP0438705 - Integrated circuit driver inhibit control method for test [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 07.03.1997 Database last updated on 26.07.2024 | Most recent event Tooltip | 07.03.1997 | No opposition filed within time limit | published on 23.04.1997 [1997/17] | Applicant(s) | For all designated states International Business Machines Corporation New Orchard Road Armonk, NY 10504 / US | [N/P] |
| Former [1991/31] | For all designated states International Business Machines Corporation Old Orchard Road Armonk, N.Y. 10504 / US | Inventor(s) | 01 /
Bassett, Robert Walter E6 Greenfield Road Essex Junction, VT 05452 / US | 02 /
Gillis, Pamela Sue RR3, Box 452 Jerico, VT 05465 / US | 03 /
Harrigan Panner, Jeannie Therese RFD 1, Box 1310 Underhill, VT 05489 / US | 04 /
Stout, Douglas Willard 38 Sheldon Road Milton, vt 05468 / US | 05 /
Turner, Mark Elliot 23 Westbrook Colchester, VT 05446 / US | [1991/31] | Representative(s) | Jost, Ottokarl IBM Deutschland Informationssysteme GmbH, Patentwesen und Urheberrecht 70548 Stuttgart / DE | [N/P] |
| Former [1991/31] | Jost, Ottokarl, Dipl.-Ing. IBM Deutschland Informationssysteme GmbH, Patentwesen und Urheberrecht D-70548 Stuttgart / DE | Application number, filing date | 90124049.9 | 13.12.1990 | [1991/31] | Priority number, date | US19900471249 | 25.01.1990 Original published format: US 471249 | [1991/31] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0438705 | Date: | 31.07.1991 | Language: | EN | [1991/31] | Type: | A3 Search report | No.: | EP0438705 | Date: | 15.07.1992 | Language: | EN | [1992/29] | Type: | B1 Patent specification | No.: | EP0438705 | Date: | 01.05.1996 | Language: | EN | [1996/18] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 26.05.1992 | Classification | IPC: | G06F11/26 | [1996/18] | CPC: |
G01R31/318513 (EP,US);
G01R31/2884 (EP,US);
G01R31/31858 (EP,US);
G01R31/318583 (EP,US);
G01R31/30 (EP,US);
G06F11/2273 (EP,US)
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| Former IPC [1991/31] | G01R31/28, G01R31/318 | Designated contracting states | DE, FR, GB [1991/31] | Title | German: | Verfahren zur Treibersteuerung integrierter Schaltungen während der Prüfung | [1996/18] | English: | Integrated circuit driver inhibit control method for test | [1991/31] | French: | Procédé pour la commande de circuit d'attaque de circuit intégré pendant le test | [1996/18] |
| Former [1991/31] | Verfahren zur Verhinderung der Treibersteuerung integrierter Schaltungen während der Prüfung | ||
| Former [1991/31] | Procédé pour empêcher la commande de circuit d'attaque de circuit intégré pendant le test | Examination procedure | 12.11.1991 | Examination requested [1992/02] | 09.11.1994 | Despatch of a communication from the examining division (Time limit: M04) | 04.03.1995 | Reply to a communication from the examining division | 21.07.1995 | Despatch of communication of intention to grant (Approval: Yes) | 03.11.1995 | Communication of intention to grant the patent | 27.12.1995 | Fee for grant paid | 27.12.1995 | Fee for publishing/printing paid | Opposition(s) | 04.02.1997 | No opposition filed within time limit [1997/17] | Fees paid | Renewal fee | 10.12.1992 | Renewal fee patent year 03 | 21.12.1993 | Renewal fee patent year 04 | 19.12.1994 | Renewal fee patent year 05 | 14.12.1995 | Renewal fee patent year 06 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A] - IBM TECHNICAL DISCLOSURE BULLETIN. vol. 25, no. 5, October 1982, NEW YORK US pages 2328 - 2330; M.C. GRAF ET AL.: 'Control of simultaneous driver switching with chip partitioning aid' | [A] - IBM TECHNICAL DISCLOSURE BULLETIN. vol. 29, no. 10, March 1987, NEW YORK US pages 4460 - 4461; 'Controlled enable of off-chip drivers during LSSD testing' | [A] - IBM TECHNICAL DISCLOSURE BULLETIN. vol. 29, no. 1, June 1986, NEW YORK US pages 251 - 252; 'Inhibit sequencing delay circuit' |