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Extract from the Register of European Patents

EP About this file: EP0384644

EP0384644 - Printed circuit board [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  08.03.1996
Database last updated on 15.07.2024
Most recent event   Tooltip08.03.1996No opposition filed within time limitpublished on 24.04.1996 [1996/17]
Applicant(s)For all designated states
TATSUTA ELECTRIC WIRE & CABLE CO., LTD.
2-3-1 Iwata-cho Higashiosaka-shi
Osaka-fu / JP
[N/P]
Former [1990/35]For all designated states
TATSUTA ELECTRIC WIRE & CABLE CO., LTD.
2-3-1 Iwata-cho
Higashiosaka-shi, Osaka-fu / JP
Inventor(s)01 / Nakatani, Fumio
109-24, Miyado-cho
Yamatokoriyama-shi, Nara-ken / JP
02 / Wakita, Shinichi
3-1-304, Chaenba-cho
Akashi-shi, Hyogo-ken / JP
03 / Murakami, Hisatoshi
8-9, 1-chome, Nishiiwata
Higashiosaka-shi, Osaka-fu / JP
04 / Terada, Tsunehiko
Midorigaoka danchi 32-204, 4, 2-chome, Midorigaoka
Ikeda-shi, Osaka-fu / JP
05 / Morimoto, Shohei, Hishiyahigashi-Ryo, Tatsuta Elec
Wire & Cable Co.Ltd. 12-25,1-chome, Hishiyahigashi
Higashiosaka-shi, Osaka-fu / JP
[1990/35]
Representative(s)Beresford, Keith Denis Lewis, et al
Beresford Crump LLP
16 High Holborn
London WC1V 6BX / GB
[N/P]
Former [1990/35]Beresford, Keith Denis Lewis, et al
BERESFORD & Co. 2-5 Warwick Court High Holborn
London WC1R 5DJ / GB
Application number, filing date90301612.915.02.1990
[1990/35]
Priority number, dateJP19890019218U21.02.1989         Original published format: JP 1921889 U
JP19890019219U21.02.1989         Original published format: JP 1921989 U
JP19890019220U21.02.1989         Original published format: JP 1922089 U
JP1989004083621.02.1989         Original published format: JP 4083689
JP1989004083721.02.1989         Original published format: JP 4083789
JP1989004083821.02.1989         Original published format: JP 4083889
[1990/35]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report 
No.:EP0384644
Date:29.08.1990
Language:EN
[1990/35]
Type: B1 Patent specification 
No.:EP0384644
Date:03.05.1995
Language:EN
[1995/18]
Search report(s)(Supplementary) European search report - dispatched on:EP09.07.1990
ClassificationIPC:H05K1/02, H05K1/16, H05K9/00
[1990/35]
CPC:
H05K1/0216 (EP,US); H05K1/0218 (EP,US); H05K1/162 (EP,US);
H05K9/0039 (EP,US); H05K1/095 (EP,US); H05K1/117 (EP,US);
H05K2201/0715 (EP,US); H05K2201/09236 (EP,US); H05K2201/09272 (EP,US);
H05K2201/09672 (EP,US); H05K2201/10689 (EP,US); H05K3/3447 (EP,US);
H05K3/4644 (EP,US); H05K3/4664 (EP,US); Y10S428/901 (EP,US) (-)
Designated contracting statesDE,   FR,   GB,   IT,   SE [1990/35]
TitleGerman:Gedruckte Leiterplatte[1990/35]
English:Printed circuit board[1990/35]
French:Plaque de circuit imprimé[1990/35]
MiscellaneousEPB 1995/18: Teilanmeldung 94202845.7 eingereicht am 15/02/90
EPB 1995/18: Divisional application 94202845.7 filed on 15/02/90
EPB 1995/18: Demande divisionnaire 94202845.7 déposée le 15/02/90
Examination procedure17.12.1990Examination requested  [1991/07]
27.08.1992Despatch of a communication from the examining division (Time limit: M06)
05.03.1993Reply to a communication from the examining division
22.06.1993Despatch of a communication from the examining division (Time limit: M06)
23.12.1993Reply to a communication from the examining division
14.06.1994Despatch of communication of intention to grant (Approval: No)
25.10.1994Despatch of communication of intention to grant (Approval: later approval)
26.10.1994Communication of intention to grant the patent
10.01.1995Fee for grant paid
10.01.1995Fee for publishing/printing paid
Divisional application(s)EP94202845.7  / EP0633715
EP94202846.5  / EP0631460
Opposition(s)06.02.1996No opposition filed within time limit [1996/17]
Fees paidRenewal fee
16.12.1991Renewal fee patent year 03
21.12.1992Renewal fee patent year 04
23.02.1994Renewal fee patent year 05
17.02.1995Renewal fee patent year 06
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Documents cited:Search[A]EP0238267  (NINTENDO CO LTD [JP], et al);
 [A]DE1936899  (SIEMENS AG);
 [A]EP0259785  (GEN ELECTRIC [US]);
 [A]FR2527039  (INF MILIT SPATIALE AERONAUT [FR])
 [A]  - IBM TECHNICAL DISCLOSURE BULLETIN, vol. 30, no. 4, September 1987, page 1558, Armonk, New York, US: "Method to form an electromagnetic shield on a component-populated electronic circuit board"
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.