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EP0430569
European procedure
Extract from the Register of European Patents
EP About this file: EP0430569
| EP0430569 - Fault tolerant interconnection networks [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 06.12.1996 Database last updated on 07.10.2024 | Most recent event Tooltip | 12.12.1997 | Correction of patent application | published on 28.01.1998 [1998/05] | Applicant(s) | For all designated states AT&T Corp. 32 Avenue of the Americas New York, NY 10013-2412 / US | [1991/23] | Inventor(s) | 01 /
Brunner, Beat Rte. du Chatelard 52 CH-1018 Lausanne / CH | 02 /
Kumar, Vijay P. 3 Tower Road Freehold, New Jersey 07728 / US | [1991/23] | Representative(s) | Buckley, Christopher Simon Thirsk, et al Lucent Technologies (UK) Ltd, 5 Mornington Road Woodford Green Essex IG8 0TU / GB | [N/P] |
| Former [1991/23] | Buckley, Christopher Simon Thirsk, et al AT&T (UK) LTD., AT&T Intellectual Property Division, 5 Mornington Road Woodford Green, Essex IG8 0TU / GB | Application number, filing date | 90312678.7 | 21.11.1990 | [1991/23] | Priority number, date | US19890444581 | 30.11.1989 Original published format: US 444581 | [1991/23] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP0430569 | Date: | 05.06.1991 | Language: | EN | [1991/23] | Type: | B1 Patent specification | No.: | EP0430569 | Date: | 31.01.1996 | [1996/05] | Type: | A1 / A2 RE Reissue of A-publication | No.: | EP0430569 | Date: | 28.01.1998 | [1998/05] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 14.03.1991 | Classification | IPC: | H04L12/56, G06F11/16 | [1991/23] | CPC: |
H04L49/557 (EP,US);
H04L49/15 (EP,US);
H04L49/254 (EP,US);
H04L49/3018 (EP,US)
| Designated contracting states | DE, FR, GB, SE [1991/23] | Title | German: | Fehlertolerante Verbindungsnetze | [1991/23] | English: | Fault tolerant interconnection networks | [1991/23] | French: | Réseaux d'interconnexion à tolérance de fautes | [1991/23] | Examination procedure | 27.11.1991 | Examination requested [1992/04] | 08.09.1993 | Despatch of a communication from the examining division (Time limit: M04) | 27.12.1993 | Reply to a communication from the examining division | 23.06.1994 | Despatch of a communication from the examining division (Time limit: M04) | 29.09.1994 | Reply to a communication from the examining division | 22.03.1995 | Despatch of communication of intention to grant (Approval: Yes) | 12.05.1995 | Communication of intention to grant the patent | 20.07.1995 | Fee for grant paid | 20.07.1995 | Fee for publishing/printing paid | Opposition(s) | 01.11.1996 | No opposition filed within time limit [1997/04] | Fees paid | Renewal fee | 16.11.1992 | Renewal fee patent year 03 | 09.11.1993 | Renewal fee patent year 04 | 16.11.1994 | Renewal fee patent year 05 | 17.11.1995 | Renewal fee patent year 06 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]EP0201356 (TANDEM COMPUTERS INC [US]) | [A] - 1983 INTERNATIONAL CONFERENCE ON PARALLEL PROCESSING August 1983, IEEE New York(US) pages 71 - 75; K.PADMANABHAN et al.: "FAULT TOLERANCE SCHEMES IN SHUFFLE-EXCHANGE TYPE INTERCONNECTION NETWORKS" | [A] - SEVENTH EUROMICRO SYMPOSIUM ON MICROPROCESSING AND MICROPROGRAMMING September 1981, NORTH HOLLAND Amsterdam(NL) pages 243 - 247; C.P.DISPARTE: "A DESIGN APPROACH FOR AN ELECTRONIC ENGINE CONTROLLER SELF-CHECKING MICROPROCESSOR" | [AD] - COMPUTER. vol. 20, no. 6, June 1987, LONG BEACH US pages 30 - 40; V.P.KUMAR et al.: "AUGMENTED SHUFFLE-EXCHANGE MULTISTAGE INTERCONNECTION NETWORKS" |