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EP0466051
European procedure
Extract from the Register of European Patents
EP About this file: EP0466051
| EP0466051 - Non-volatile progammable read only memory device having memory cells each implemented by a memory transistor and a switching transistor coupled in parallel and method of memorizing a data bit [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 17.01.1997 Database last updated on 05.10.2024 | Most recent event Tooltip | 17.01.1997 | No opposition filed within time limit | published on 05.03.1997 [1997/10] | Applicant(s) | For all designated states NEC Corporation 7-1, Shiba 5-chome Minato-ku Tokyo 108-8001 / JP | [N/P] |
| Former [1992/03] | For all designated states NEC CORPORATION 7-1, Shiba 5-chome Minato-ku Tokyo / JP | Inventor(s) | 01 /
Koyama, Shoji, c/o NEC Corporation 7-1, Shiba 5-chome Minato-ku, Tokyo / JP | [1992/03] | Representative(s) | Glawe, Delfs, Moll Partnerschaft mbB von Patent- und Rechtsanwälten Postfach 26 01 62 80058 München / DE | [N/P] |
| Former [1992/03] | Glawe, Delfs, Moll & Partner Patentanwälte Postfach 26 01 62 D-80058 München / DE | Application number, filing date | 91111235.7 | 05.07.1991 | [1992/03] | Priority number, date | JP19900184816 | 11.07.1990 Original published format: JP 18481690 | [1992/03] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0466051 | Date: | 15.01.1992 | Language: | EN | [1992/03] | Type: | A3 Search report | No.: | EP0466051 | Date: | 07.01.1993 | Language: | EN | [1993/01] | Type: | B1 Patent specification | No.: | EP0466051 | Date: | 13.03.1996 | Language: | EN | [1996/11] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 13.11.1992 | Classification | IPC: | G11C16/04 | [1992/03] | CPC: |
G11C16/0483 (EP,US)
| Designated contracting states | DE, FR, GB [1992/03] | Title | German: | Programmierbarer nichtflüchtiger Festwertspeicher mit Speicherzellen, jeder mit einem Speichertransistor und einem parallel gekoppelten Schalttransistor und Verfahren zur Speicherung eines Datenbit | [1992/03] | English: | Non-volatile progammable read only memory device having memory cells each implemented by a memory transistor and a switching transistor coupled in parallel and method of memorizing a data bit | [1992/03] | French: | Dispositif de mémoire morte nonvolatile programmable ayant des cellules de mémoire chacune comprenant entre autres un transistor de mémoire et un transistor de commutation couplé en parallèle et méthode d'emmagasinage d'un bit de donnée | [1992/03] | Examination procedure | 05.07.1991 | Examination requested [1992/03] | 12.05.1995 | Despatch of communication of intention to grant (Approval: Yes) | 19.09.1995 | Communication of intention to grant the patent | Opposition(s) | 14.12.1996 | No opposition filed within time limit [1997/10] | Fees paid | Renewal fee | 16.07.1993 | Renewal fee patent year 03 | 20.07.1994 | Renewal fee patent year 04 | 18.07.1995 | Renewal fee patent year 05 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [Y]EP0135824 (FUJITSU LTD [JP]); | [YP]EP0419663 (TOSHIBA KK [JP], et al) |