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EP0481425
European procedure
Extract from the Register of European Patents
EP About this file: EP0481425
| EP0481425 - Asynchronous access type semiconductor memory device equipped with data latching unit for preventing output data information from noises [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 24.10.1997 Database last updated on 30.07.2024 | Most recent event Tooltip | 24.10.1997 | No opposition filed within time limit | published on 10.12.1997 [1997/50] | Applicant(s) | For all designated states NEC Corporation 7-1, Shiba 5-chome Minato-ku Tokyo 108-8001 / JP | [N/P] |
| Former [1992/17] | For all designated states NEC CORPORATION 7-1, Shiba 5-chome Minato-ku Tokyo / JP | Inventor(s) | 01 /
Kamaya, Michinori, c/o NEC IC Microcomp. Sys. Ltd. 403-53, Kosugimachi 1-chome, Nakahara-ku Kawasaki-shi, Kanagawa / JP | [1992/17] | Representative(s) | Glawe, Delfs, Moll Partnerschaft mbB von Patent- und Rechtsanwälten Postfach 26 01 62 80058 München / DE | [N/P] |
| Former [1994/35] | Glawe, Delfs, Moll & Partner Patentanwälte Postfach 26 01 62 D-80058 München / DE | ||
| Former [1992/17] | Glawe, Delfs, Moll & Partner Patentanwälte Postfach 26 01 62 D-80058 München / DE | Application number, filing date | 91117574.3 | 15.10.1991 | [1992/17] | Priority number, date | JP19900276058 | 15.10.1990 Original published format: JP 27605890 | [1992/17] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0481425 | Date: | 22.04.1992 | Language: | EN | [1992/17] | Type: | A3 Search report | No.: | EP0481425 | Date: | 14.12.1994 | Language: | EN | [1994/50] | Type: | B1 Patent specification | No.: | EP0481425 | Date: | 18.12.1996 | Language: | EN | [1996/51] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 28.10.1994 | Classification | IPC: | G11C7/00 | [1992/17] | CPC: |
G11C7/1051 (EP,US);
G11C11/40 (KR)
| Designated contracting states | DE, FR, GB [1992/17] | Title | German: | Halbleiterspeicheranordnung von asynchronem Zugrifftyp mit einer Datenverrieglungseinheit zum Abschützen von Ausgangsdaten gegen Störungen | [1992/17] | English: | Asynchronous access type semiconductor memory device equipped with data latching unit for preventing output data information from noises | [1992/17] | French: | Dispositif de mémoire à semi-conducteurs de type à accès asynchrone ayant une unité de verrouillage de données pour protéger des données de sortie contre des bruits | [1992/17] | Examination procedure | 15.10.1991 | Examination requested [1992/17] | 08.02.1996 | Despatch of communication of intention to grant (Approval: Yes) | 18.06.1996 | Communication of intention to grant the patent | 19.09.1996 | Fee for grant paid | 19.09.1996 | Fee for publishing/printing paid | Opposition(s) | 19.09.1997 | No opposition filed within time limit [1997/50] | Fees paid | Renewal fee | 20.10.1993 | Renewal fee patent year 03 | 20.10.1994 | Renewal fee patent year 04 | 19.10.1995 | Renewal fee patent year 05 | 18.10.1996 | Renewal fee patent year 06 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]GB2070372 (TOKYO SHIBAURA ELECTRIC CO)[A] 1-3; | [X]US4701889 (ANDO MANABU [JP]) [X] 1; | [A]EP0322901 (TOSHIBA KK [JP], et al) [A] 1; | [A]US4849938 (FURUTANI KIYOHIRO [JP], et al) [A] 1; | [A]US4916671 (ICHIGUCHI TETSUICHIRO [JP]) [A] 1,2,3 |