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Extract from the Register of European Patents

EP About this file: EP0492806

EP0492806 - Identification of pin-open faults by capacitive coupling through the integrated circuit package [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  18.09.1998
Database last updated on 09.09.2024
Most recent event   Tooltip18.09.1998No opposition filed within time limitpublished on 04.11.1998 [1998/45]
Applicant(s)For all designated states
Hewlett-Packard Company
3000 Hanover Street
Palo Alto, CA 94304-1112 / US
[N/P]
Former [1992/27]For all designated states
Hewlett-Packard Company
3000 Hanover Street
Palo Alto, California 94304 / US
Inventor(s)01 / Cilingiroglu, Ugur
1501 Harvey Road, Apt. 846
College Station, TX 77840 / US
[1992/27]
Representative(s)Colgan, Stephen James, et al
CARPMAELS & RANSFORD 43 Bloomsbury Square
London WC1A 2RA / GB
[N/P]
Former [1992/27]Colgan, Stephen James, et al
CARPMAELS & RANSFORD 43 Bloomsbury Square
London WC1A 2RA / GB
Application number, filing date91310861.926.11.1991
[1992/27]
Priority number, dateUS1990063160920.12.1990         Original published format: US 631609
[1992/27]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0492806
Date:01.07.1992
Language:EN
[1992/27]
Type: A3 Search report 
No.:EP0492806
Date:14.10.1992
Language:EN
[1992/42]
Type: B1 Patent specification 
No.:EP0492806
Date:12.11.1997
Language:EN
[1997/46]
Search report(s)(Supplementary) European search report - dispatched on:EP25.08.1992
ClassificationIPC:G01R31/312, G01R31/04
[1992/42]
CPC:
G01R31/312 (EP,US); G01R31/70 (EP,US)
Former IPC [1992/27]G01R31/312
Designated contracting statesDE,   FR,   GB [1992/27]
TitleGerman:Identifizierung von nichtverbundenen Anschlussstiften durch kapazitive Kopplung durch das Gehäuse der integrierten Schaltung[1992/27]
English:Identification of pin-open faults by capacitive coupling through the integrated circuit package[1992/27]
French:Identification des broches non connectées par couplage capacitif à travers un boîtier du circuit intégré[1992/27]
Examination procedure19.03.1993Examination requested  [1993/20]
15.12.1994Despatch of a communication from the examining division (Time limit: M10)
24.08.1995Reply to a communication from the examining division
15.02.1996Despatch of a communication from the examining division (Time limit: M06)
19.08.1996Reply to a communication from the examining division
28.01.1997Despatch of communication of intention to grant (Approval: No)
28.04.1997Despatch of communication of intention to grant (Approval: later approval)
05.05.1997Communication of intention to grant the patent
28.05.1997Fee for grant paid
28.05.1997Fee for publishing/printing paid
Opposition(s)13.08.1998No opposition filed within time limit [1998/45]
Fees paidRenewal fee
15.10.1993Renewal fee patent year 03
31.10.1994Renewal fee patent year 04
30.10.1995Renewal fee patent year 05
28.10.1996Renewal fee patent year 06
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Documents cited:Search[A]US4695788  (MARSHALL NEIL A [US]);
 [A]GB2179751  (BICC PLC);
 [A]EP0317440  (THOMSON CSF [FR])
ExaminationFR2101335
by applicantEP0317440
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.