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WO9112630
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EP About this file: WO9112630
| WO9112630 - SPIN-ON GLASS PROCESSING TECHNIQUE FOR THE FABRICATION OF SEMICONDUCTOR DEVICES [Right-click to bookmark this link] | Status | The application is deemed to be withdrawn Database last updated on 29.03.2025 | Most recent event Tooltip | 08.08.2008 | Change - representative | published on 10.09.2008 [2008/37] | Applicant(s) | For all designated states MITEL CORPORATION 350 Legget Drive, P.O. Box 13089 Kanata Ontario K2K 1X3 / CA | [N/P] | Inventor(s) | 01 /
OUELLET, Luc 711 Caron Granby, Quebec J2J 1M7 / CA | [N/P] | Representative(s) | Copp, David Christopher Dummett Copp 25 The Square Martlesham Heath Ipswich IP5 3SL Suffolk / GB | [2008/37] |
| Former [2008/37] | Copp, David Christopher Dummett Copp & Co. 25 The Square Martlesham Heath Ipswich Suffolk IP5 7SL / GB | Application number, filing date | 91903569.1 | 06.02.1991 | WO1991CA00041 | Priority number, date | CA19902009518 | 07.02.1990 Original published format: CA 2009518 | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | WO9112630 | Date: | 22.08.1991 | Language: | EN | [1991/19] | Search report(s) | International search report - published on: | EP | 22.08.1991 | Classification | IPC: | H01L21/316 | CPC: |
H01L21/02129 (EP,US);
H01L21/3105 (EP,US);
H01L21/31051 (EP,US);
H01L21/31058 (EP,US);
H01L21/3121 (US);
H01L21/3122 (US);
H01L21/316 (US);
H01L21/76801 (EP,US);
H01L21/76819 (EP,US);
H01L23/296 (EP,US);
H01L21/02126 (EP,US);
H01L21/02216 (EP,US);
| C-Set: |
H01L2924/0002, H01L2924/00 (EP,US)
| Designated contracting states | AT, BE, CH, DE, DK, ES, FR, GB, GR, IT, LI, LU, NL, SE | Title | German: | TECHNIK ZUR VERARBEITUNG VON AUSGESCHLEUDERTEM GLAS IN DER HERSTELLUNG VON HALBLEITERANORDNUNGEN | English: | SPIN-ON GLASS PROCESSING TECHNIQUE FOR THE FABRICATION OF SEMICONDUCTOR DEVICES | French: | TECHNIQUE DE TRAITEMENT DE VERRE DEPOSE PAR ROTATION UTILE POUR FABRIQUER DES DISPOSITIFS SEMI-CONDUCTEURS | Entry into regional phase | 05.08.1992 | National basic fee paid | 05.08.1992 | Designation fee(s) paid | Examination procedure | 07.11.1991 | Application deemed to be withdrawn, date of legal effect [ ] | 13.02.1992 | Despatch of communication that the application is deemed to be withdrawn, reason: filing fee / search fee not paid in time [ ] | Appeal following examination | 22.12.1993 | Appeal received No. J0003/94 | 02.03.1994 | Statement of grounds filed | 19.10.1994 | Invitation to file observations in an appeal (Time limit: M02) [1994/43] | 28.03.1995 | Result of appeal procedure: rejection of appeal | 28.03.1995 | Date of oral proceedings | 07.04.1995 | Minutes of oral proceedings despatched | Request for re-establishment of rights: | 08.09.1992 | Date of receipt | 28.10.1993 | Request rejected | Fees paid | Renewal fee | 08.02.1994 | Renewal fee patent year 04 | Penalty fee | Penalty fee Rule 85a EPC 1973 | 17.12.1991 | AT M01 Not yet paid | 17.12.1991 | BE M01 Not yet paid | 17.12.1991 | CH M01 Not yet paid | 17.12.1991 | DE M01 Not yet paid | 17.12.1991 | DK M01 Not yet paid | 17.12.1991 | ES M01 Not yet paid | 17.12.1991 | FR M01 Not yet paid | 17.12.1991 | GB M01 Not yet paid | 17.12.1991 | GR M01 Not yet paid | 17.12.1991 | IT M01 Not yet paid | 17.12.1991 | LU M01 Not yet paid | 17.12.1991 | NL M01 Not yet paid | 17.12.1991 | SE M01 Not yet paid | Cited in | International search | DE2038109 [ ] (NCR CO); | DE2146954 [ ] (MONSANTO CO); | FR2123652 [ ] (IBM); | US4185294 [ ] (OHASHI YOSHIE [JP], et al); | US4826709 [ ] (RYAN VIVIAN W [US], et al) | [Y] - Journal of the Electrochemical Society, vol. 137, no. 1, January 1990, The Electrochemical Society, Inc., (Manchester, NH, US), G. Smolinsky et al.: "Material properties of spin-on silicon oxide (SOX) for fully recessed NMOS field isolation"pages 229-234 | [A] - Thin Solid Films, vol. 157, no. 1, 15 February 1988, Elsevier Sequoia, (Lausanne, CH), M. Kuisl: "Silicon dioxide films prepared by spin-on solutions"pages 129-134 | [A] - Philips Journal of Research, vol. 44, nos 2/3, 28 July 1989, K. osinski et al.: "A lum CMOS process for logic applications"pages 257-293 |