Extract from the Register of European Patents

EP About this file: EP0521367

EP0521367 - Video signal processing circuit [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  02.07.1999
Database last updated on 07.04.2026
Most recent event   Tooltip02.07.1999No opposition filed within time limitpublished on 18.08.1999 [1999/33]
Applicant(s)For all designated states
SANYO ELECTRIC CO., LTD.
18, Keihanhondori 2-chome
Moriguchi-shi, Osaka / JP
[1993/01]
Inventor(s)01 / Murata, Haruhiko
1-2-9-709, Dainichi-cho
Moriguchi-shi, Osaka / JP
02 / Mori, Yukio
167-205, Yawatahukurokudani
Yawata-shi, Kyoto / JP
03 / Maenaka, Akihiro
2-96-3 2-301, Yagumohigashimachi
Moriguchi-shi, Osaka / JP
04 / Takuma, Masao
1-4-39-101, Terauchi
Toyonaka-shi, Osaka / JP
05 / Kawakami, Kiyotada
4-3-4-407, Imazunaka, Tsurumi-ku
Osaka-shi, Osaka / JP
06 / Yamamoto, Tooru
2-19-13-103, Akai
Daito-shi, Osaka / JP
07 / Asaeda, Tooru
2100-1-112, Minami Tahara-cho
Ikoma-shi, Nara / JP
[1993/01]
Representative(s)Glawe, Delfs, Moll
Partnerschaft mbB von
Patent- und Rechtsanwälten
Postfach 26 01 62
80058 München / DE
[N/P]
Former [1993/01]Glawe, Delfs, Moll & Partner
Patentanwälte Postfach 26 01 62
D-80058 München / DE
Application number, filing date92110513.622.06.1992
[1993/01]
Priority number, dateJP1991015036521.06.1991         Original published format: JP 15036591
JP1992005166710.03.1992         Original published format: JP 5166792
[1993/01]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0521367
Date:07.01.1993
Language:EN
[1993/01]
Type: A3 Search report 
No.:EP0521367
Date:30.03.1994
Language:EN
[1994/13]
Type: B1 Patent specification 
No.:EP0521367
Date:26.08.1998
Language:EN
[1998/35]
Search report(s)(Supplementary) European search report - dispatched on:EP04.02.1994
ClassificationIPC:H04N9/64, H04N5/262, H04N5/202
[1994/12]
CPC:
H04N9/64 (EP,US)
Former IPC [1993/01]H04N9/64
Designated contracting statesDE,   FR,   GB [1993/01]
TitleGerman:Videosignalverarbeitungsschaltung[1993/01]
English:Video signal processing circuit[1993/01]
French:Circuit de traitement de signal vidéo[1993/01]
Examination procedure01.08.1994Examination requested  [1994/39]
20.08.1996Despatch of a communication from the examining division (Time limit: M06)
28.02.1997Reply to a communication from the examining division
27.05.1997Despatch of a communication from the examining division (Time limit: M02)
06.08.1997Reply to a communication from the examining division
15.10.1997Despatch of communication of intention to grant (Approval: Yes)
09.12.1997Communication of intention to grant the patent
18.03.1998Fee for grant paid
18.03.1998Fee for publishing/printing paid
Opposition(s)27.05.1999No opposition filed within time limit [1999/33]
Fees paidRenewal fee
17.06.1994Renewal fee patent year 03
16.06.1995Renewal fee patent year 04
20.06.1996Renewal fee patent year 05
20.06.1997Renewal fee patent year 06
23.06.1998Renewal fee patent year 07
Opt-out from the exclusive  Tooltip
competence of the Unified
Patent Court
See the Register of the Unified Patent Court for opt-out data
Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Documents cited:Search[A] JPH02131679  
 [A] JPH03106269  
 [A]   PATENT ABSTRACTS OF JAPAN vol. 14, no. 368 (E - 962) 9 August 1990 (1990-08-09) [A] 1,2 * abstract *
 [A]   HIDEMITSU NIKOH ET AL.: "New Digital Signal Processor for Video Camera System", NEC RESEARCH & DEVELOPMENT, vol. 32, no. 2, April 1991 (1991-04-01), TOKYO (JP), pages 214 - 219, XP000258455 [A] 1-3 * the whole document *
 [A]   PATENT ABSTRACTS OF JAPAN vol. 15, no. 299 (E - 1095) 30 July 1991 (1991-07-30) [A] 3 * abstract *
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.