EP0535701 - Architecture and method for combining static cache memory and dynamic main memory on the same chip (CDRAM) [Right-click to bookmark this link] | Status | The application is deemed to be withdrawn Status updated on 21.04.1994 Database last updated on 22.05.2024 | Most recent event Tooltip | 15.03.1995 | Change - representative | published on 03.05.1995 [1995/18] | Applicant(s) | For all designated states STANDARD MICROSYSTEMS CORPORATION 80 Arkay Drive, P.O. Box 18047 Hauppauge New York 11788-8847 / US | [N/P] |
Former [1993/14] | For all designated states STANDARD MICROSYSTEMS CORPORATION 80 Arkay Drive Hauppauge, New York 11788 / US | Inventor(s) | 01 /
Wanlass, Frank M. 540 Dawn Drive Sunnyvale, California 94087 / US | [1993/14] | Representative(s) | Blumbach · Zinngrebe Patentanwälte PartG mbB Alexandrastraße 5 65187 Wiesbaden / DE | [N/P] |
Former [1995/18] | Blumbach, Kramer & Partner Patentanwälte, Sonnenberger Strasse 100 D-65193 Wiesbaden / DE | ||
Former [1993/14] | Blumbach Weser Bergen Kramer Zwirner Hoffmann Patentanwälte Sonnenberger Strasse 100 D-65193 Wiesbaden / DE | Application number, filing date | 92116915.7 | 02.10.1992 | [1993/14] | Priority number, date | US19910770641 | 03.10.1991 Original published format: US 770641 | [1993/14] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP0535701 | Date: | 07.04.1993 | Language: | EN | [1993/14] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 18.01.1993 | Classification | IPC: | G06F12/08 | [1993/14] | CPC: |
G06F12/0893 (EP)
| Designated contracting states | BE, DE, DK, ES, FR, GB, GR, IT, LU, NL, PT [1993/14] | Title | German: | Architektur und Verfahren zum Kombinieren eines statischen Cache-Speichers und eines dynamischen Hauptspeichers auf dem gleichen Chip (CDRAM) | [1993/14] | English: | Architecture and method for combining static cache memory and dynamic main memory on the same chip (CDRAM) | [1993/14] | French: | Architecture et procédé pour combiner une antémémoire statique et une mémoire principale dynamique sur la même puce (CDRAM) | [1993/14] | File destroyed: | 03.09.2001 | Examination procedure | 08.10.1993 | Application deemed to be withdrawn, date of legal effect [1994/23] | 12.01.1994 | Despatch of communication that the application is deemed to be withdrawn, reason: examination fee not paid in time [1994/23] |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [X]DE4110173 (MITSUBISHI ELECTRIC CORP [JP]); | [Y]US4317168 (MESSINA BENEDICTO U, et al) |