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EP0534746
European procedure
Extract from the Register of European Patents
EP About this file: EP0534746
| EP0534746 - Method of fabricating a trench structure in a semiconductor substrate [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 30.11.2001 Database last updated on 19.10.2024 | Most recent event Tooltip | 05.10.2005 | Change: Appeal number | Applicant(s) | For all designated states MOTOROLA, INC. 1303 East Algonquin Road Schaumburg, IL 60196 / US | [1993/13] | Inventor(s) | 01 /
Wilson, Syd R. 14215 N 43rd Place Phoenix, Arizona 85032 / US | 02 /
See, Yee-Chaung 1674 E. Salt Sage Drive Phoenix, Arizona 85044 / US | 03 /
Liang, Han-Bin Kuo 1122 W. Mendoza Mesa, Arizona 85210 / US | 04 /
Zirkle, Thomas 2014 E. Manhatton Drive Tempe, Arizona 85282 / US | [1993/13] | Representative(s) | Hudson, Peter David, et al Motorola European Intellectual Property Midpoint Alencon Link, Basingstoke Hampshire RG21 7PL / GB | [N/P] |
| Former [1993/13] | Hudson, Peter David, et al Motorola European Intellectual Property Midpoint Alencon Link Basingstoke, Hampshire RG21 7PL / GB | Application number, filing date | 92308687.0 | 24.09.1992 | [1993/13] | Priority number, date | US19910766316 | 27.09.1991 Original published format: US 766316 | [1993/13] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0534746 | Date: | 31.03.1993 | Language: | EN | [1993/13] | Type: | A3 Search report | No.: | EP0534746 | Date: | 17.08.1994 | Language: | EN | [1994/33] | Type: | B1 Patent specification | No.: | EP0534746 | Date: | 24.01.2001 | Language: | EN | [2001/04] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 06.07.1994 | Classification | IPC: | H01L21/76, H01L21/32 | [1994/34] | CPC: |
H01L21/32 (EP,US);
H01L21/743 (EP,US);
H01L21/763 (EP,US)
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| Former IPC [1993/13] | H01L21/76 | Designated contracting states | DE, FR, GB, IT [1993/13] | Title | German: | Verfahren zur Herstellung einer Graberstruktur in einem Halbleitersubstrat | [1993/13] | English: | Method of fabricating a trench structure in a semiconductor substrate | [1993/13] | French: | Méthode de fabrication d'une structure de rainure dans un substrat semi-conducteur | [1993/13] | Examination procedure | 17.02.1995 | Examination requested [1995/16] | 27.03.1995 | Despatch of a communication from the examining division (Time limit: M04) | 15.09.1995 | Despatch of communication that the application is deemed to be withdrawn, reason: reply to the communication from the examining division not received in time | 20.11.1995 | Reply to a communication from the examining division | 20.11.1995 | Request for decision received: division | 24.06.1996 | Result of request for decision (division): Request rejected | 03.06.1999 | Despatch of a communication from the examining division (Time limit: M04) | 08.10.1999 | Reply to a communication from the examining division | 15.03.2000 | Despatch of communication of intention to grant (Approval: Yes) | 26.07.2000 | Communication of intention to grant the patent | 06.11.2000 | Fee for grant paid | 06.11.2000 | Fee for publishing/printing paid | Appeal following examination | 04.09.1996 | Appeal received No. J0030/97 | 04.09.1996 | Statement of grounds filed | 12.11.1997 | Interlocutory revision of appeal | 12.11.1997 | Result of appeal procedure: appeal withdrawn | Opposition(s) | 25.10.2001 | No opposition filed within time limit [2002/03] | Request for further processing for: | 04.09.1996 | Request for further processing filed | 04.09.1996 | Full payment received (date of receipt of payment) Request granted | 11.07.1997 | Decision despatched | Fees paid | Renewal fee | 28.07.1994 | Renewal fee patent year 03 | 02.10.1995 | Renewal fee patent year 04 | 30.09.1996 | Renewal fee patent year 05 | 30.09.1997 | Renewal fee patent year 06 | 30.09.1998 | Renewal fee patent year 07 | 30.09.1999 | Renewal fee patent year 08 | 13.09.2000 | Renewal fee patent year 09 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Lapses during opposition Tooltip | GB | 24.09.2001 | [2003/01] | Documents cited: | Search | [YA]EP0425965 (MOTOROLA INC [US]) [Y] 1,6 * column 4, line 41 - column 5, line 43; figures 1-12; claims 1,10 * [A] 2-5,7 | [Y] - "FORMATION OF THERMAL ISOLATION CAP OXIDE", IBM TECHNICAL DISCLOSURE BULLETIN., NEW YORK US, (199009), vol. 33, no. 04, pages 463 - 465 [Y] 1,6 * the whole document * | [A] - P.H. PAN, "BIRD'S BEAK-FREE SEMI-ROX WITH LARGE RADIUS ON CORNER CURVATURE", IBM TECHNICAL DISCLOSURE BULLETIN., NEW YORK US, (198411), vol. 27, no. 06, pages 3264 - 3265 [A] 6,10 * the whole document * | [A] - Y.-C.S. YU ET AL., "PLANARIZED DEEP-TRENCH PROCESS FOR BIPOLAR DEVICE ISOLATION", EXTENDED ABSTRACTS, PRINCETON, NEW JERSEY US, (1988), vol. 88, no. 02, pages 326 - 327 [A] 1 * figures 1A-1B * | [A] - B.Y NGUYEN, "FRAMED MASK POLY BUFFERED LOCOS ISOLATION FOR SUBMICRON VLSI TECHNOLOGY", EXTENDED ABSTRACTS, PRINCETON, NEW JERSEY US, (1990), vol. 90, no. 01, pages 614 - 615 [A] 6 * the whole document * |