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EP0601560
European procedure
Extract from the Register of European Patents
EP About this file: EP0601560
| EP0601560 - Differential amplifier circuit [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 16.07.1999 Database last updated on 15.06.2024 | Most recent event Tooltip | 25.07.2008 | Change - representative | published on 27.08.2008 [2008/35] | Applicant(s) | For all designated states NEC Corporation 7-1, Shiba 5-chome Minato-ku Tokyo 108-8001 / JP | [N/P] |
| Former [1994/24] | For all designated states NEC CORPORATION 7-1, Shiba 5-chome Minato-ku Tokyo / JP | Inventor(s) | 01 /
Kimura, Katsuji, c/o NEC CORPORATION 7-1, Shiba 5-chome, Minato-ku Tokyo / JP | [1994/24] | Representative(s) | Vossius & Partner Patentanwälte Rechtsanwälte mbB Siebertstrasse 3 81675 München / DE | [N/P] |
| Former [2008/35] | Vossius & Partner Siebertstrasse 3 81675 München / DE | ||
| Former [1994/24] | VOSSIUS & PARTNER Siebertstrasse 4 D-81675 München / DE | Application number, filing date | 93119773.5 | 08.12.1993 | [1994/24] | Priority number, date | JP19920351747 | 08.12.1992 Original published format: JP 35174792 | [1994/24] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP0601560 | Date: | 15.06.1994 | Language: | EN | [1994/24] | Type: | B1 Patent specification | No.: | EP0601560 | Date: | 09.09.1998 | Language: | EN | [1998/37] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 19.04.1994 | Classification | IPC: | H03F3/45, H03F1/32 | [1994/24] | CPC: |
H03F1/3211 (EP,US)
| Designated contracting states | DE, FR, GB, IT, NL, SE [1994/24] | Title | German: | Differenzverstärkerschaltung | [1994/24] | English: | Differential amplifier circuit | [1994/24] | French: | Circuit amplificateur différentiel | [1994/24] | Miscellaneous | EPB 1998/37: (deleted) | EPB 1998/37: (deleted) | EPB 1998/37: (deleted) | EPB 1997/44: Teilanmeldung 97113589.2 eingereicht am 06/08/97 | EPB 1997/44: Divisional application 97113589.2 filed on 06/08/97 | EPB 1997/44: Demande divisionnaire 97113589.2 déposée le 06/08/97 | Examination procedure | 28.04.1994 | Examination requested [1994/25] | 22.07.1996 | Despatch of a communication from the examining division (Time limit: M07) | 03.03.1997 | Reply to a communication from the examining division | 27.03.1997 | Despatch of a communication from the examining division (Time limit: M04) | 06.08.1997 | Reply to a communication from the examining division | 24.10.1997 | Despatch of communication of intention to grant (Approval: No) | 03.03.1998 | Despatch of communication of intention to grant (Approval: later approval) | 12.03.1998 | Communication of intention to grant the patent | 22.06.1998 | Fee for grant paid | 22.06.1998 | Fee for publishing/printing paid | Divisional application(s) | EP97113589.2 / EP0809351 | Opposition(s) | 10.06.1999 | No opposition filed within time limit [1999/35] | Fees paid | Renewal fee | 29.12.1995 | Renewal fee patent year 03 | 31.12.1996 | Renewal fee patent year 04 | 30.12.1997 | Renewal fee patent year 05 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]DE3027071 (PHILIPS PATENTVERWALTUNG [DE]) [A] * page 6, line 10 - line 32; figures 1,2 *; | [Y]EP0312016 (TOSHIBA KK [JP]) [Y] 1-5,7,9,12 * abstract *; | [Y] - PAN WU ET AL, "A CMOS OTA with improved linearity based on current addition", IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, NEW ORLEANS, (199005), pages 2296 - 2299, XP000163663 [Y] 1-5,7,9,12 * page 2297 - page 2299 * * paragraph III Design Considerations * | [A] - G. A. DE VEIRMAN ET AL, "Design of a bipolar 10-MHz programmable continuous-time 0.05 degree equiripple linear phase filter", IEEE JOURNAL OF SOLID-STATE CIRCUITS, NEW YORK US, (199203), vol. 27, no. 3, doi:doi:10.1109/4.121554, pages 324 - 331, XP000295882 [A] * page 325, paragraph II - page 326 * DOI: http://dx.doi.org/10.1109/4.121554 | [A] - Z. CZARNUL ET AL, "Highly-linear transconductor cell realised by double MOS transistor differential pairs", ELECTRONICS LETTERS, STEVENAGE GB, (19901011), vol. 26, no. 21, pages 1819 - 1821 | [A] - G. WILSON ET AL, "Comparison of four CMOS transconductors for fully integrated analogue filter applications", IEE PROCEEDINGS-G, STEVENAGE, GB, (199112), vol. 138, no. 6, pages 683 - 688, XP000274477 [A] * page 685, column L; figure 2B * | [AD] - A. NEDUNGADI ET AL, "Design of linear CMOS transconductance elements", IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, NEW YORK, (198410), vol. CAS -31, no. 10, pages 891 - 894 [AD] * page 893, paragraph 4; figure 3 * |