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Extract from the Register of European Patents

EP About this file: EP0594427

EP0594427 - A printed circuit board mounted with electric elements thereon [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  01.12.2000
Database last updated on 07.10.2024
Most recent event   Tooltip01.12.2000No opposition filed within time limitpublished on 17.01.2001 [2001/03]
Applicant(s)For all designated states
NEC Corporation
7-1, Shiba 5-chome Minato-ku
Tokyo 108-8001 / JP
[N/P]
Former [2000/05]For all designated states
NEC CORPORATION
7-1, Shiba 5-chome, Minato-ku
Tokyo / JP
Former [1994/17]For all designated states
NEC CORPORATION
7-1, Shiba 5-chome Minato-ku
Tokyo / JP
Inventor(s)01 / Kawaguchi, Joji, c/o NEC CORPORATION
7-1, Shiba 5-chome, Minato-ku
Tokyo / JP
[1994/17]
Representative(s)Moir, Michael Christopher, et al
Mathys & Squire LLP
120 Holborn
London
EC1N 2SQ / GB
[N/P]
Former [1994/17]Moir, Michael Christopher, et al
Mathys & Squire 100 Grays Inn Road
London WC1X 8AL / GB
Application number, filing date93308379.221.10.1993
[1994/17]
Priority number, dateJP1992028263821.10.1992         Original published format: JP 28263892
[1994/17]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0594427
Date:27.04.1994
Language:EN
[1994/17]
Type: A3 Search report 
No.:EP0594427
Date:21.06.1995
Language:EN
[1995/25]
Type: B1 Patent specification 
No.:EP0594427
Date:02.02.2000
Language:EN
[2000/05]
Search report(s)(Supplementary) European search report - dispatched on:EP04.05.1995
ClassificationIPC:H05K1/18, H05K1/09
[1994/17]
CPC:
H05K1/181 (EP,US); H05K3/244 (EP,US); H01L2924/0002 (EP,US);
H01L2924/19105 (EP,US); H05K2201/10681 (EP,US); H05K3/361 (EP,US);
Y02P70/50 (EP,US) (-)
C-Set:
H01L2924/0002, H01L2924/00 (EP,US)
Designated contracting statesDE,   FR,   GB,   IT,   NL,   SE [1994/17]
TitleGerman:Leiterplatte mit darauf montierten elektrischen Bauelementen[1994/17]
English:A printed circuit board mounted with electric elements thereon[1994/17]
French:Plaque à circuit imprimé avec des éléments électriques montés dessus[1994/17]
Examination procedure22.05.1995Examination requested  [1995/29]
14.09.1998Despatch of a communication from the examining division (Time limit: M06)
24.03.1999Reply to a communication from the examining division
16.06.1999Despatch of communication of intention to grant (Approval: Yes)
12.08.1999Communication of intention to grant the patent
07.10.1999Fee for grant paid
07.10.1999Fee for publishing/printing paid
Opposition(s)03.11.2000No opposition filed within time limit [2001/03]
Fees paidRenewal fee
21.10.1995Renewal fee patent year 03
23.10.1996Renewal fee patent year 04
23.10.1997Renewal fee patent year 05
21.10.1998Renewal fee patent year 06
21.10.1999Renewal fee patent year 07
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Documents cited:Search[Y]EP0402811  (HEWLETT PACKARD GMBH [DE]) [Y] 2 * column 4, line 45 - column 5, line 11 * * column 10, line 13 - line 43 *;
 [Y]JPS5990938  ;
 [X]JPH0451582  ;
 [X]JPH04116837  ;
 [A]EP0081135  (IBM [US]) [A] 1-3 * claim - *
 [XY]  - D. PERRY, "Multiple technologies shrink future PCB modules", PRINTED CIRCUIT DESIGN, (199102), vol. 8, no. 2, pages 36 - 41, XP000962643 [X] 1,3 * the whole document * [Y] 2
 [Y]  - M. KOHARA ET AL., "New developments of thin plastic package with high terminal counts", IEEE TRANSACTIONS ON COMPONENTS,HYBRIDS,AND MANUFACTURING TECHNOLOGY, NEW YORK US, (199006), vol. 13, no. 2, pages 401 - 406, XP000179253 [Y] 2 * page 405, column L *

DOI:   http://dx.doi.org/10.1109/33.56175
 [Y]  - PATENT ABSTRACTS OF JAPAN, (19840920), vol. 008, no. 206, Database accession no. (E - 267), & JP59090938 A 19840525 (NIPPON DENKI KK) [Y] 2 * abstract *
 [X]  - PATENT ABSTRACTS OF JAPAN, (19920605), vol. 16, no. 246, Database accession no. (E - 1212), & JP04051582 A 19920220 (NEC CORP) [X] 1 * abstract *
 [X]  - PATENT ABSTRACTS OF JAPAN, (19920807), vol. 16, no. 367, Database accession no. (E - 1245), & JP04116837 A 19920417 (MATSUSHITA ELECTRIC IND CO) [X] 1 * abstract *
 [XA]  - C. RICE, "Reliable bonding of high-lead-count SMDs", SURFACE MOUNT TECHNOLOGY, (199202), vol. 6, no. 2, pages 41 - 42, XP000654227 [X] 1 * the whole document * [A] 2
 [X]  - M. BAKER ET AL., "A mixed technology goes three ways", SURFACE MOUNT TECHNOLOGY, (199109), vol. 5, no. 9, pages 26 - 29, XP000962644 [X] 1 * the whole document *
 [X]  - PH. CLOT, "Chip on board (COB) multichip modules design pssibilities and manufacturing", 11TH IEEE/CHMT INTERNATIONAL ELECTRONICS MANUFACTURING TECHNOLOGY SYMPOSIUM, 16-18 SEPTEMBER 1991, SAN FRANCISCO US, (1991), pages 346 - 347, XP000244945 [X] 1 * the whole document *
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.